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Commit 94937fff authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm into next/dt 

From Tony Prisk, vt8500 devicetree updates for 3.11.

* tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm

:
  dts: vt8500: Correct reference clock on WM8850 SoCs
  dts: vt8500: Add ARM, AHB, APB and DDR clock nodes to SoC files
  dts: vt8500: Populate missing PLL nodes
  dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL  clocks
  dts: vt8500: Update serial nodes and disable by default in SoC files
  dts: vt8500: Add devicetree support for WM8750 SoC and APC8750 board
  dts: vt8500: Fix invalid/missing cpu nodes for soc files.

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 54edc252 e36572b6

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -211,6 +211,7 @@ dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb 
dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \

	wm8505-ref.dtb \

	wm8650-mid.dtb \

	wm8750-apc8750.dtb \

	wm8850-w70v2.dtb

dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb

arch/arm/boot/dts/vt8500-bv07.dts

+4 −0
Original line number Diff line number Diff line
@@ -30,3 +30,7 @@ 
		};

	};

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/vt8500.dtsi

+25 −4
Original line number Diff line number Diff line
@@ -11,6 +11,23 @@ 
/ {

	compatible = "via,vt8500";



	cpus {

		#address-cells = <0>;

		#size-cells = <0>;



		cpu {

			device_type = "cpu";

			compatible = "arm,arm926ej-s";

		};

	};



	aliases {

		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;

		serial3 = &uart3;

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;
@@ -111,32 +128,36 @@ 
			reg = <0xd8050400 0x100>;

		};



		uart@d8200000 {

		uart0: serial@d8200000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8200000 0x1040>;

			interrupts = <32>;

			clocks = <&clkuart0>;

			status = "disabled";

		};



		uart@d82b0000 {

		uart1: serial@d82b0000 {

			compatible = "via,vt8500-uart";

			reg = <0xd82b0000 0x1040>;

			interrupts = <33>;

			clocks = <&clkuart1>;

			status = "disabled";

		};



		uart@d8210000 {

		uart2: serial@d8210000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8210000 0x1040>;

			interrupts = <47>;

			clocks = <&clkuart2>;

			status = "disabled";

		};



		uart@d82c0000 {

		uart3: serial@d82c0000 {

			compatible = "via,vt8500-uart";

			reg = <0xd82c0000 0x1040>;

			interrupts = <50>;

			clocks = <&clkuart3>;

			status = "disabled";

		};



		rtc@d8100000 {

arch/arm/boot/dts/wm8505-ref.dts

+4 −0
Original line number Diff line number Diff line
@@ -30,3 +30,7 @@ 
		};

	};

};



&uart0 {

	status = "okay";

};

arch/arm/boot/dts/wm8505.dtsi

+76 −8
Original line number Diff line number Diff line
@@ -12,11 +12,24 @@ 
	compatible = "wm,wm8505";



	cpus {

		cpu@0 {

			compatible = "arm,arm926ejs";

		#address-cells = <0>;

		#size-cells = <0>;



		cpu {

			device_type = "cpu";

			compatible = "arm,arm926ej-s";

		};

	};



 	aliases {

		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;

		serial3 = &uart3;

		serial4 = &uart4;

		serial5 = &uart5;

 	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;
@@ -68,6 +81,13 @@ 
					clock-frequency = <25000000>;

				};



				plla: plla {

					#clock-cells = <0>;

					compatible = "via,vt8500-pll-clock";

					clocks = <&ref25>;

					reg = <0x200>;

				};



				pllb: pllb {

					#clock-cells = <0>;

					compatible = "via,vt8500-pll-clock";
@@ -75,6 +95,48 @@ 
					reg = <0x204>;

				};



				pllc: pllc {

					#clock-cells = <0>;

					compatible = "via,vt8500-pll-clock";

					clocks = <&ref25>;

					reg = <0x208>;

				};



				plld: plld {

					#clock-cells = <0>;

					compatible = "via,vt8500-pll-clock";

					clocks = <&ref25>;

					reg = <0x20c>;

				};



				clkarm: arm {

					#clock-cells = <0>;

					compatible = "via,vt8500-device-clock";

					clocks = <&plla>;

					divisor-reg = <0x300>;

				};



				clkahb: ahb {

					#clock-cells = <0>;

					compatible = "via,vt8500-device-clock";

					clocks = <&pllb>;

					divisor-reg = <0x304>;

				};



				clkapb: apb {

					#clock-cells = <0>;

					compatible = "via,vt8500-device-clock";

					clocks = <&pllb>;

					divisor-reg = <0x350>;

				};



				clkddr: ddr {

					#clock-cells = <0>;

					compatible = "via,vt8500-device-clock";

					clocks = <&plld>;

					divisor-reg = <0x310>;

				};



				clkuart0: uart0 {

					#clock-cells = <0>;

					compatible = "via,vt8500-device-clock";
@@ -163,46 +225,52 @@ 
			reg = <0xd8050400 0x100>;

		};



		uart@d8200000 {

		uart0: serial@d8200000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8200000 0x1040>;

			interrupts = <32>;

			clocks = <&clkuart0>;

			status = "disabled";

		};



		uart@d82b0000 {

		uart1: serial@d82b0000 {

			compatible = "via,vt8500-uart";

			reg = <0xd82b0000 0x1040>;

			interrupts = <33>;

			clocks = <&clkuart1>;

			status = "disabled";

		};



		uart@d8210000 {

		uart2: serial@d8210000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8210000 0x1040>;

			interrupts = <47>;

			clocks = <&clkuart2>;

			status = "disabled";

		};



		uart@d82c0000 {

		uart3: serial@d82c0000 {

			compatible = "via,vt8500-uart";

			reg = <0xd82c0000 0x1040>;

			interrupts = <50>;

			clocks = <&clkuart3>;

			status = "disabled";

		};



		uart@d8370000 {

		uart4: serial@d8370000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8370000 0x1040>;

			interrupts = <31>;

			clocks = <&clkuart4>;

			status = "disabled";

		};



		uart@d8380000 {

		uart5: serial@d8380000 {

			compatible = "via,vt8500-uart";

			reg = <0xd8380000 0x1040>;

			interrupts = <30>;

			clocks = <&clkuart5>;

			status = "disabled";

		};



		rtc@d8100000 {