Loading arch/arm64/boot/dts/qcom/sm6150.dtsi +1 −23 Original line number Diff line number Diff line Loading @@ -2268,17 +2268,6 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp { Loading @@ -2299,17 +2288,6 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; thermal_zones: thermal-zones {}; Loading Loading @@ -3185,7 +3163,7 @@ #include "sm6150-audio.dtsi" #include "sm6150-sde-pll.dtsi" #include "sm6150-sde.dtsi" #include "msm-rdbg.dtsi" &msm_vidc { qcom,cx-ipeak-data = <&cx_ipeak_lm 4>; qcom,clock-freq-threshold = <380000000>; Loading Loading
arch/arm64/boot/dts/qcom/sm6150.dtsi +1 −23 Original line number Diff line number Diff line Loading @@ -2268,17 +2268,6 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-cdsp { Loading @@ -2299,17 +2288,6 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { qcom,entry-name = "rdbg"; #qcom,smem-state-cells = <1>; }; smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { qcom,entry-name = "rdbg"; interrupt-controller; #interrupt-cells = <2>; }; }; thermal_zones: thermal-zones {}; Loading Loading @@ -3185,7 +3163,7 @@ #include "sm6150-audio.dtsi" #include "sm6150-sde-pll.dtsi" #include "sm6150-sde.dtsi" #include "msm-rdbg.dtsi" &msm_vidc { qcom,cx-ipeak-data = <&cx_ipeak_lm 4>; qcom,clock-freq-threshold = <380000000>; Loading