Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +1 −1 Original line number Diff line number Diff line Loading @@ -790,7 +790,7 @@ static int dsi_ctrl_validate_panel_info(struct dsi_ctrl *dsi_ctrl, } /* Function returns number of bits per pxl */ static int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) { u32 bpp = 0; Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +4 −0 Original line number Diff line number Diff line Loading @@ -778,4 +778,8 @@ int dsi_ctrl_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl *dsi_ctrl); */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); /** * dsi_ctrl_pixel_format_to_bpp() - returns number of bits per pxl */ int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format); #endif /* _DSI_CTRL_H_ */ drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +7 −0 Original line number Diff line number Diff line Loading @@ -437,6 +437,8 @@ int dsi_conn_set_info_blob(struct drm_connector *connector, { struct dsi_display *dsi_display = display; struct dsi_panel *panel; enum dsi_pixel_format fmt; u32 bpp; if (!info || !dsi_display) return -EINVAL; Loading Loading @@ -557,6 +559,11 @@ int dsi_conn_set_info_blob(struct drm_connector *connector, mode_info->roi_caps.merge_rois); } fmt = dsi_display->config.common_config.dst_format; bpp = dsi_ctrl_pixel_format_to_bpp(fmt); sde_kms_info_add_keyint(info, "bit_depth", bpp); end: return 0; } Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +1 −1 Original line number Diff line number Diff line Loading @@ -790,7 +790,7 @@ static int dsi_ctrl_validate_panel_info(struct dsi_ctrl *dsi_ctrl, } /* Function returns number of bits per pxl */ static int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) { u32 bpp = 0; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +4 −0 Original line number Diff line number Diff line Loading @@ -778,4 +778,8 @@ int dsi_ctrl_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl *dsi_ctrl); */ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); /** * dsi_ctrl_pixel_format_to_bpp() - returns number of bits per pxl */ int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format); #endif /* _DSI_CTRL_H_ */
drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +7 −0 Original line number Diff line number Diff line Loading @@ -437,6 +437,8 @@ int dsi_conn_set_info_blob(struct drm_connector *connector, { struct dsi_display *dsi_display = display; struct dsi_panel *panel; enum dsi_pixel_format fmt; u32 bpp; if (!info || !dsi_display) return -EINVAL; Loading Loading @@ -557,6 +559,11 @@ int dsi_conn_set_info_blob(struct drm_connector *connector, mode_info->roi_caps.merge_rois); } fmt = dsi_display->config.common_config.dst_format; bpp = dsi_ctrl_pixel_format_to_bpp(fmt); sde_kms_info_add_keyint(info, "bit_depth", bpp); end: return 0; } Loading