[MIPS] PMC MSP71xx mips common (9267a30d) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/mips/Kconfig

+35 −0

Original line number	Original line	Diff line number	Diff line
	@@ -250,6 +250,7 @@ config MIPS_SIM
	select DMA_NONCOHERENT		select DMA_NONCOHERENT
	select SYS_HAS_EARLY_PRINTK		select SYS_HAS_EARLY_PRINTK
	select IRQ_CPU		select IRQ_CPU
			select BOOT_RAW
	select SYS_HAS_CPU_MIPS32_R1		select SYS_HAS_CPU_MIPS32_R1
	select SYS_HAS_CPU_MIPS32_R2		select SYS_HAS_CPU_MIPS32_R2
	select SYS_HAS_EARLY_PRINTK		select SYS_HAS_EARLY_PRINTK
	@@ -333,6 +334,27 @@ config MACH_VR41XX
	select SYS_HAS_CPU_VR41XX		select SYS_HAS_CPU_VR41XX
	select GENERIC_HARDIRQS_NO__DO_IRQ		select GENERIC_HARDIRQS_NO__DO_IRQ

			config PMC_MSP
			bool "PMC-Sierra MSP chipsets"
			depends on EXPERIMENTAL
			select DMA_NONCOHERENT
			select SWAP_IO_SPACE
			select NO_EXCEPT_FILL
			select BOOT_RAW
			select SYS_HAS_CPU_MIPS32_R1
			select SYS_HAS_CPU_MIPS32_R2
			select SYS_SUPPORTS_32BIT_KERNEL
			select SYS_SUPPORTS_BIG_ENDIAN
			select SYS_SUPPORTS_KGDB
			select IRQ_CPU
			select SERIAL_8250
			select SERIAL_8250_CONSOLE
			help
			This adds support for the PMC-Sierra family of Multi-Service
			Processor System-On-A-Chips. These parts include a number
			of integrated peripherals, interfaces and DSPs in addition to
			a variety of MIPS cores.

	config PMC_YOSEMITE		config PMC_YOSEMITE
	bool "PMC-Sierra Yosemite eval board"		bool "PMC-Sierra Yosemite eval board"
	select DMA_COHERENT		select DMA_COHERENT
	@@ -706,6 +728,9 @@ config ARC
	config ARCH_MAY_HAVE_PC_FDC		config ARCH_MAY_HAVE_PC_FDC
	bool		bool

			config BOOT_RAW
			bool

	config DMA_COHERENT		config DMA_COHERENT
	bool		bool

	@@ -812,6 +837,12 @@ config IRQ_CPU_RM7K
	config IRQ_CPU_RM9K		config IRQ_CPU_RM9K
	bool		bool

			config IRQ_MSP_SLP
			bool

			config IRQ_MSP_CIC
			bool

	config IRQ_MV64340		config IRQ_MV64340
	bool		bool

	@@ -825,6 +856,9 @@ config MIPS_BOARDS_GEN
	config PCI_GT64XXX_PCI0		config PCI_GT64XXX_PCI0
	bool		bool

			config NO_EXCEPT_FILL
			bool

	config MIPS_TX3927		config MIPS_TX3927
	bool		bool
	select HAS_TXX9_SERIAL		select HAS_TXX9_SERIAL
	@@ -886,6 +920,7 @@ config MIPS_L1_CACHE_SHIFT
	int		int
	default "4" if MACH_DECSTATION \|\| SNI_RM		default "4" if MACH_DECSTATION \|\| SNI_RM
	default "7" if SGI_IP27		default "7" if SGI_IP27
			default "4" if PMC_MSP4200_EVAL
	default "5"		default "5"

	config HAVE_STD_PC_SERIAL_PORT		config HAVE_STD_PC_SERIAL_PORT

arch/mips/Makefile

+10 −1

Original line number	Original line	Diff line number	Diff line
	@@ -342,6 +342,14 @@ core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
	cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot		cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
	load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000		load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000

			#
			# PMC-Sierra MSP SOCs
			#
			core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
			cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \
			-mno-branch-likely
			load-$(CONFIG_PMC_MSP) += 0xffffffff80100000

	#		#
	# PMC-Sierra Yosemite		# PMC-Sierra Yosemite
	#		#
	@@ -595,7 +603,8 @@ JIFFIES = jiffies_64
	endif		endif

	AFLAGS += $(cflags-y)		AFLAGS += $(cflags-y)
	CFLAGS += $(cflags-y)		CFLAGS += $(cflags-y) \
			-D"VMLINUX_LOAD_ADDRESS=$(load-y)"

	LDFLAGS += -m $(ld-emul)		LDFLAGS += -m $(ld-emul)

arch/mips/kernel/cpu-probe.c

+20 −0

Original line number	Original line	Diff line number	Diff line
	@@ -186,9 +186,29 @@ static inline void check_wait(void)
	}		}
	}		}

			static inline void check_errata(void)
			{
			struct cpuinfo_mips *c = &current_cpu_data;

			switch (c->cputype) {
			case CPU_34K:
			/*
			* Erratum "RPS May Cause Incorrect Instruction Execution"
			* This code only handles VPE0, any SMP/SMTC/RTOS code
			* making use of VPE1 will be responsable for that VPE.
			*/
			if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2)
			write_c0_config7(read_c0_config7() \| MIPS_CONF7_RPS);
			break;
			default:
			break;
			}
			}

	void __init check_bugs32(void)		void __init check_bugs32(void)
	{		{
	check_wait();		check_wait();
			check_errata();
	}		}

	/*		/*

arch/mips/kernel/head.S

+4 −1

Original line number	Original line	Diff line number	Diff line
	@@ -16,6 +16,7 @@
	#include <linux/init.h>		#include <linux/init.h>
	#include <linux/threads.h>		#include <linux/threads.h>

			#include <asm/addrspace.h>
	#include <asm/asm.h>		#include <asm/asm.h>
	#include <asm/asmmacro.h>		#include <asm/asmmacro.h>
	#include <asm/irqflags.h>		#include <asm/irqflags.h>
	@@ -129,16 +130,18 @@
	#endif		#endif
	.endm		.endm

			#ifndef CONFIG_NO_EXCEPT_FILL
	/*		/*
	* Reserved space for exception handlers.		* Reserved space for exception handlers.
	* Necessary for machines which link their kernels at KSEG0.		* Necessary for machines which link their kernels at KSEG0.
	*/		*/
	.fill 0x400		.fill 0x400
			#endif

	EXPORT(stext) # used for profiling		EXPORT(stext) # used for profiling
	EXPORT(_stext)		EXPORT(_stext)

	#ifndef CONFIG_MIPS_SIM		#ifdef CONFIG_BOOT_RAW
	/*		/*
	* Give us a fighting chance of running if execution beings at the		* Give us a fighting chance of running if execution beings at the
	* kernel load address. This is needed because this platform does		* kernel load address. This is needed because this platform does

arch/mips/kernel/traps.c

+6 −0

Original line number	Original line	Diff line number	Diff line
	@@ -69,6 +69,7 @@ extern asmlinkage void handle_reserved(void);
	extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,		extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
	struct mips_fpu_struct *ctx, int has_fpu);		struct mips_fpu_struct *ctx, int has_fpu);

			void (board_watchpoint_handler)(struct pt_regs regs);
	void (*board_be_init)(void);		void (*board_be_init)(void);
	int (board_be_handler)(struct pt_regs regs, int is_fixup);		int (board_be_handler)(struct pt_regs regs, int is_fixup);
	void (*board_nmi_handler_setup)(void);		void (*board_nmi_handler_setup)(void);
	@@ -833,6 +834,11 @@ asmlinkage void do_mdmx(struct pt_regs *regs)

	asmlinkage void do_watch(struct pt_regs *regs)		asmlinkage void do_watch(struct pt_regs *regs)
	{		{
			if (board_watchpoint_handler) {
			(*board_watchpoint_handler)(regs);
			return;
			}

	/*		/*
	* We use the watch exception where available to detect stack		* We use the watch exception where available to detect stack
	* overflows.		* overflows.