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Commit 91839fd5 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel 

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915: Fix LVDS fixed-mode regression from 219adae1
  drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
  drm/i915: Avoid might_fault during pwrite whilst holding our mutex
  agp/intel: fix cache control for sandybridge
  agp/intel: restore cache behavior on sandybridge
  drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge
  drm/i915: Fix KMS regression on Sandybridge/CPT
  i915: reprogram power monitoring registers on resume
  drm/i915: SNB BLT workaround
  drm/i915: Fix the graphics frequency clamping at init and when IPS is active.
  drm/i915: Allow powersave modparam to be adjusted at runtime.
  drm/i915: Apply big hammer to serialise buffer access between rings
  drm/i915: opregion_setup: iounmap correct address
  drm/i915: Flush read-only buffers from the active list upon idle as well
  i915: signedness bug in check_overlay_src()
  drm/i915: Fix typo from "Enable DisplayPort Audio"
parents a7bcf21e 3f8ff0e7

drivers/char/agp/intel-gtt.c

+3 −3
Original line number Diff line number Diff line
@@ -1210,14 +1210,14 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry, 
	unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;

	u32 pte_flags;



	if (type_mask == AGP_USER_UNCACHED_MEMORY)

	if (type_mask == AGP_USER_MEMORY)

		pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;

	else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) {

		pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;

		pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;

		if (gfdt)

			pte_flags |= GEN6_PTE_GFDT;

	} else { /* set 'normal'/'cached' to LLC by default */

		pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;

		pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;

		if (gfdt)

			pte_flags |= GEN6_PTE_GFDT;

	}

drivers/gpu/drm/i915/i915_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ unsigned int i915_fbpercrtc = 0; 
module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);



unsigned int i915_powersave = 1;

module_param_named(powersave, i915_powersave, int, 0400);

module_param_named(powersave, i915_powersave, int, 0600);



unsigned int i915_lvds_downclock = 0;

module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1321,6 +1321,7 @@ static inline void i915_write(struct drm_i915_private *dev_priv, u32 reg, 


#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)

#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)

#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)



#define PRIMARY_RINGBUFFER_SIZE         (128*1024)

drivers/gpu/drm/i915/i915_gem.c

+71 −44
Original line number Diff line number Diff line
@@ -2172,7 +2172,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj) 
static int i915_ring_idle(struct drm_device *dev,

			  struct intel_ring_buffer *ring)

{

	if (list_empty(&ring->gpu_write_list))

	if (list_empty(&ring->gpu_write_list) && list_empty(&ring->active_list))

		return 0;



	i915_gem_flush_ring(dev, NULL, ring,
@@ -2190,9 +2190,7 @@ i915_gpu_idle(struct drm_device *dev) 
	int ret;



	lists_empty = (list_empty(&dev_priv->mm.flushing_list) &&

		       list_empty(&dev_priv->render_ring.active_list) &&

		       list_empty(&dev_priv->bsd_ring.active_list) &&

		       list_empty(&dev_priv->blt_ring.active_list));

		       list_empty(&dev_priv->mm.active_list));

	if (lists_empty)

		return 0;
@@ -3108,7 +3106,8 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj, 
	 * write domain

	 */

	if (obj->write_domain &&

	    obj->write_domain != obj->pending_read_domains) {

	    (obj->write_domain != obj->pending_read_domains ||

	     obj_priv->ring != ring)) {

		flush_domains |= obj->write_domain;

		invalidate_domains |=

			obj->pending_read_domains & ~obj->write_domain;
@@ -3497,6 +3496,52 @@ i915_gem_execbuffer_pin(struct drm_device *dev, 
	return 0;

}



static int

i915_gem_execbuffer_move_to_gpu(struct drm_device *dev,

				struct drm_file *file,

				struct intel_ring_buffer *ring,

				struct drm_gem_object **objects,

				int count)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret, i;



	/* Zero the global flush/invalidate flags. These

	 * will be modified as new domains are computed

	 * for each object

	 */

	dev->invalidate_domains = 0;

	dev->flush_domains = 0;

	dev_priv->mm.flush_rings = 0;

	for (i = 0; i < count; i++)

		i915_gem_object_set_to_gpu_domain(objects[i], ring);



	if (dev->invalidate_domains | dev->flush_domains) {

#if WATCH_EXEC

		DRM_INFO("%s: invalidate_domains %08x flush_domains %08x\n",

			  __func__,

			 dev->invalidate_domains,

			 dev->flush_domains);

#endif

		i915_gem_flush(dev, file,

			       dev->invalidate_domains,

			       dev->flush_domains,

			       dev_priv->mm.flush_rings);

	}



	for (i = 0; i < count; i++) {

		struct drm_i915_gem_object *obj = to_intel_bo(objects[i]);

		/* XXX replace with semaphores */

		if (obj->ring && ring != obj->ring) {

			ret = i915_gem_object_wait_rendering(&obj->base, true);

			if (ret)

				return ret;

		}

	}



	return 0;

}



/* Throttle our rendering by waiting until the ring has completed our requests

 * emitted over 20 msec ago.

 *
@@ -3757,33 +3802,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, 
		goto err;

	}



	/* Zero the global flush/invalidate flags. These

	 * will be modified as new domains are computed

	 * for each object

	 */

	dev->invalidate_domains = 0;

	dev->flush_domains = 0;

	dev_priv->mm.flush_rings = 0;



	for (i = 0; i < args->buffer_count; i++) {

		struct drm_gem_object *obj = object_list[i];



		/* Compute new gpu domains and update invalidate/flush */

		i915_gem_object_set_to_gpu_domain(obj, ring);

	}



	if (dev->invalidate_domains | dev->flush_domains) {

#if WATCH_EXEC

		DRM_INFO("%s: invalidate_domains %08x flush_domains %08x\n",

			  __func__,

			 dev->invalidate_domains,

			 dev->flush_domains);

#endif

		i915_gem_flush(dev, file,

			       dev->invalidate_domains,

			       dev->flush_domains,

			       dev_priv->mm.flush_rings);

	}

	ret = i915_gem_execbuffer_move_to_gpu(dev, file, ring,

					      object_list, args->buffer_count);

	if (ret)

		goto err;



	for (i = 0; i < args->buffer_count; i++) {

		struct drm_gem_object *obj = object_list[i];
@@ -4856,17 +4878,24 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, 
		     struct drm_file *file_priv)

{

	struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);

	void *obj_addr;

	int ret;

	char __user *user_data;

	void *vaddr = obj_priv->phys_obj->handle->vaddr + args->offset;

	char __user *user_data = (char __user *) (uintptr_t) args->data_ptr;



	user_data = (char __user *) (uintptr_t) args->data_ptr;

	obj_addr = obj_priv->phys_obj->handle->vaddr + args->offset;

	DRM_DEBUG_DRIVER("vaddr %p, %lld\n", vaddr, args->size);



	DRM_DEBUG_DRIVER("obj_addr %p, %lld\n", obj_addr, args->size);

	ret = copy_from_user(obj_addr, user_data, args->size);

	if (ret)

	if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) {

		unsigned long unwritten;



		/* The physical object once assigned is fixed for the lifetime

		 * of the obj, so we can safely drop the lock and continue

		 * to access vaddr.

		 */

		mutex_unlock(&dev->struct_mutex);

		unwritten = copy_from_user(vaddr, user_data, args->size);

		mutex_lock(&dev->struct_mutex);

		if (unwritten)

			return -EFAULT;

	}



	drm_agp_chipset_flush(dev);

	return 0;
@@ -4900,9 +4929,7 @@ i915_gpu_is_active(struct drm_device *dev) 
	int lists_empty;



	lists_empty = list_empty(&dev_priv->mm.flushing_list) &&

		      list_empty(&dev_priv->render_ring.active_list) &&

		      list_empty(&dev_priv->bsd_ring.active_list) &&

		      list_empty(&dev_priv->blt_ring.active_list);

		      list_empty(&dev_priv->mm.active_list);



	return !lists_empty;

}

drivers/gpu/drm/i915/i915_gem_evict.c

+2 −6
Original line number Diff line number Diff line
@@ -165,9 +165,7 @@ i915_gem_evict_everything(struct drm_device *dev) 


	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&

		       list_empty(&dev_priv->mm.flushing_list) &&

		       list_empty(&dev_priv->render_ring.active_list) &&

		       list_empty(&dev_priv->bsd_ring.active_list) &&

		       list_empty(&dev_priv->blt_ring.active_list));

		       list_empty(&dev_priv->mm.active_list));

	if (lists_empty)

		return -ENOSPC;
@@ -184,9 +182,7 @@ i915_gem_evict_everything(struct drm_device *dev) 


	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&

		       list_empty(&dev_priv->mm.flushing_list) &&

		       list_empty(&dev_priv->render_ring.active_list) &&

		       list_empty(&dev_priv->bsd_ring.active_list) &&

		       list_empty(&dev_priv->blt_ring.active_list));

		       list_empty(&dev_priv->mm.active_list));

	BUG_ON(!lists_empty);



	return 0;