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Commit 91407487 authored by Amit Nischal's avatar Amit Nischal
Browse files

ARM: dts: msm: Update the dispcc and camcc nodes on SDMMAGPIE



Update the DISPCC and CAMCC clock controller device nodes to
register to actual DISPCC and CAMCC drivers. Also update the
DISPCC and CAMCC GDSCs by replacing the dummy nodes with
actual GDSC regulator driver.

Change-Id: Ia5af82bd88d87d914249ee596c90b79d2767a798
Signed-off-by: default avatarAmit Nischal <anischal@codeaurora.org>
parent f0f3487f
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+7 −7
Original line number Original line Diff line number Diff line
@@ -110,7 +110,7 @@


	/* GDSCs in Camera CC */
	/* GDSCs in Camera CC */
	bps_gdsc: qcom,gdsc@ad07004 {
	bps_gdsc: qcom,gdsc@ad07004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "bps_gdsc";
		regulator-name = "bps_gdsc";
		reg = <0xad07004 0x4>;
		reg = <0xad07004 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -118,7 +118,7 @@
	};
	};


	ife_0_gdsc: qcom,gdsc@ad0a004 {
	ife_0_gdsc: qcom,gdsc@ad0a004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "ife_0_gdsc";
		regulator-name = "ife_0_gdsc";
		reg = <0xad0a004 0x4>;
		reg = <0xad0a004 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -126,7 +126,7 @@
	};
	};


	ife_1_gdsc: qcom,gdsc@ad0b004 {
	ife_1_gdsc: qcom,gdsc@ad0b004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "ife_1_gdsc";
		regulator-name = "ife_1_gdsc";
		reg = <0xad0b004 0x4>;
		reg = <0xad0b004 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -134,7 +134,7 @@
	};
	};


	ipe_0_gdsc: qcom,gdsc@ad08004 {
	ipe_0_gdsc: qcom,gdsc@ad08004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "ipe_0_gdsc";
		regulator-name = "ipe_0_gdsc";
		reg = <0xad08004 0x4>;
		reg = <0xad08004 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -142,7 +142,7 @@
	};
	};


	ipe_1_gdsc: qcom,gdsc@ad09004 {
	ipe_1_gdsc: qcom,gdsc@ad09004 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "ipe_1_gdsc";
		regulator-name = "ipe_1_gdsc";
		reg = <0xad09004 0x4>;
		reg = <0xad09004 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -150,7 +150,7 @@
	};
	};


	titan_top_gdsc: qcom,gdsc@ad0c1c4 {
	titan_top_gdsc: qcom,gdsc@ad0c1c4 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "titan_top_gdsc";
		regulator-name = "titan_top_gdsc";
		reg = <0xad0c1c4 0x4>;
		reg = <0xad0c1c4 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
@@ -159,7 +159,7 @@


	/* GDSCs in Display CC */
	/* GDSCs in Display CC */
	mdss_core_gdsc: qcom,gdsc@0f03000 {
	mdss_core_gdsc: qcom,gdsc@0f03000 {
		compatible = "regulator-fixed";
		compatible = "qcom,gdsc";
		regulator-name = "mdss_core_gdsc";
		regulator-name = "mdss_core_gdsc";
		reg = <0xaf03000 0x4>;
		reg = <0xaf03000 0x4>;
		qcom,poll-cfg-gdscr;
		qcom,poll-cfg-gdscr;
+10 −5
Original line number Original line Diff line number Diff line
@@ -655,8 +655,11 @@
	};
	};


	clock_camcc: qcom,camcc {
	clock_camcc: qcom,camcc {
		compatible = "qcom,dummycc";
		compatible = "qcom,camcc-sdmmagpie", "syscon";
		clock-output-names = "camcc_clocks";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		vdd_mx-supply = <&VDD_MX_LEVEL>;
		reg = <0xad00000 0x10000>;
		reg-names = "cc_base";
		#clock-cells = <1>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#reset-cells = <1>;
	};
	};
@@ -681,9 +684,11 @@
		#reset-cells = <1>;
		#reset-cells = <1>;
	};
	};


	clock_dispcc: qcom,dispcc {
	clock_dispcc: qcom,dispcc@af00000 {
		compatible = "qcom,dummycc";
		compatible = "qcom,dispcc-sdmmagpie", "syscon";
		clock-output-names = "dispcc_clocks";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		reg = <0xaf00000 0x20000>;
		reg-names = "cc_base";
		#clock-cells = <1>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		#reset-cells = <1>;
	};
	};