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Commit 902cc69a authored by Cyrille Pitchen's avatar Cyrille Pitchen
Browse files

mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes 



This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.

Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: default avatarMark Brown <broonie@kernel.org>
Acked-by: default avatarMarek Vasut <marek.vasut@gmail.com>
parent 9e276de6

drivers/mtd/devices/serial_flash_cmds.h

+0 −7
Original line number Diff line number Diff line
@@ -18,19 +18,12 @@ 
#define SPINOR_OP_RDVCR		0x85



/* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */

#define SPINOR_OP_READ_1_2_2	0xbb	/* DUAL I/O READ */

#define SPINOR_OP_READ_1_4_4	0xeb	/* QUAD I/O READ */



#define SPINOR_OP_WRITE		0x02	/* PAGE PROGRAM */

#define SPINOR_OP_WRITE_1_1_2	0xa2	/* DUAL INPUT PROGRAM */

#define SPINOR_OP_WRITE_1_2_2	0xd2	/* DUAL INPUT EXT PROGRAM */

#define SPINOR_OP_WRITE_1_1_4	0x32	/* QUAD INPUT PROGRAM */

#define SPINOR_OP_WRITE_1_4_4	0x12	/* QUAD INPUT EXT PROGRAM */



/* READ commands with 32-bit addressing */

#define SPINOR_OP_READ4_1_2_2	0xbc

#define SPINOR_OP_READ4_1_4_4	0xec



/* Configuration flags */

#define FLASH_FLAG_SINGLE	0x000000ff

#define FLASH_FLAG_READ_WRITE	0x00000001

drivers/mtd/devices/st_spi_fsm.c

+14 −14
Original line number Diff line number Diff line
@@ -507,12 +507,12 @@ static struct seq_rw_config n25q_read3_configs[] = { 
 *	- 'FAST' variants configured for 8 dummy cycles (see note above.)

 */

static struct seq_rw_config n25q_read4_configs[] = {

	{FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4,	0, 4, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4,	0, 1, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2,	0, 2, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2,	0, 1, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_FAST,	SPINOR_OP_READ4_FAST,	0, 1, 1, 0x00, 0, 8},

	{FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4,	0, 1, 1, 0x00, 0, 0},

	{FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_FAST,	SPINOR_OP_READ_FAST_4B,  0, 1, 1, 0x00, 0, 8},

	{FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B,       0, 1, 1, 0x00, 0, 0},

	{0x00,			0,                       0, 0, 0, 0x00, 0, 0},

};
@@ -553,12 +553,12 @@ static int stfsm_mx25_en_32bit_addr_seq(struct stfsm_seq *seq) 
 * entering a state that is incompatible with the SPIBoot Controller.

 */

static struct seq_rw_config stfsm_s25fl_read4_configs[] = {

	{FLASH_FLAG_READ_1_4_4,  SPINOR_OP_READ4_1_4_4,  0, 4, 4, 0x00, 2, 4},

	{FLASH_FLAG_READ_1_1_4,  SPINOR_OP_READ4_1_1_4,  0, 1, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_2_2,  SPINOR_OP_READ4_1_2_2,  0, 2, 2, 0x00, 4, 0},

	{FLASH_FLAG_READ_1_1_2,  SPINOR_OP_READ4_1_1_2,  0, 1, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_FAST,   SPINOR_OP_READ4_FAST,   0, 1, 1, 0x00, 0, 8},

	{FLASH_FLAG_READ_WRITE,  SPINOR_OP_READ4,        0, 1, 1, 0x00, 0, 0},

	{FLASH_FLAG_READ_1_4_4,  SPINOR_OP_READ_1_4_4_4B,  0, 4, 4, 0x00, 2, 4},

	{FLASH_FLAG_READ_1_1_4,  SPINOR_OP_READ_1_1_4_4B,  0, 1, 4, 0x00, 0, 8},

	{FLASH_FLAG_READ_1_2_2,  SPINOR_OP_READ_1_2_2_4B,  0, 2, 2, 0x00, 4, 0},

	{FLASH_FLAG_READ_1_1_2,  SPINOR_OP_READ_1_1_2_4B,  0, 1, 2, 0x00, 0, 8},

	{FLASH_FLAG_READ_FAST,   SPINOR_OP_READ_FAST_4B,   0, 1, 1, 0x00, 0, 8},

	{FLASH_FLAG_READ_WRITE,  SPINOR_OP_READ_4B,        0, 1, 1, 0x00, 0, 0},

	{0x00,                   0,                        0, 0, 0, 0x00, 0, 0},

};

drivers/mtd/spi-nor/spi-nor.c

+4 −4
Original line number Diff line number Diff line
@@ -1625,16 +1625,16 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) 
			/* Dedicated 4-byte command set */

			switch (nor->flash_read) {

			case SPI_NOR_QUAD:

				nor->read_opcode = SPINOR_OP_READ4_1_1_4;

				nor->read_opcode = SPINOR_OP_READ_1_1_4_4B;

				break;

			case SPI_NOR_DUAL:

				nor->read_opcode = SPINOR_OP_READ4_1_1_2;

				nor->read_opcode = SPINOR_OP_READ_1_1_2_4B;

				break;

			case SPI_NOR_FAST:

				nor->read_opcode = SPINOR_OP_READ4_FAST;

				nor->read_opcode = SPINOR_OP_READ_FAST_4B;

				break;

			case SPI_NOR_NORMAL:

				nor->read_opcode = SPINOR_OP_READ4;

				nor->read_opcode = SPINOR_OP_READ_4B;

				break;

			}

			nor->program_opcode = SPINOR_OP_PP_4B;

drivers/spi/spi-bcm-qspi.c

+3 −3
Original line number Diff line number Diff line
@@ -371,7 +371,7 @@ static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi, int width, 
			/* default mode, does not need flex_cmd */

			flex_mode = 0;

		else

			command = SPINOR_OP_READ4_FAST;

			command = SPINOR_OP_READ_FAST_4B;

		break;

	case SPI_NBITS_DUAL:

		bpc = 0x00000001;
@@ -384,7 +384,7 @@ static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi, int width, 
		} else {

			command = SPINOR_OP_READ_1_1_2;

			if (spans_4byte)

				command = SPINOR_OP_READ4_1_1_2;

				command = SPINOR_OP_READ_1_1_2_4B;

		}

		break;

	case SPI_NBITS_QUAD:
@@ -399,7 +399,7 @@ static int bcm_qspi_bspi_set_flex_mode(struct bcm_qspi *qspi, int width, 
		} else {

			command = SPINOR_OP_READ_1_1_4;

			if (spans_4byte)

				command = SPINOR_OP_READ4_1_1_4;

				command = SPINOR_OP_READ_1_1_4_4B;

		}

		break;

	default:

include/linux/mtd/spi-nor.h

+16 −6
Original line number Diff line number Diff line
@@ -43,9 +43,13 @@ 
#define SPINOR_OP_WRSR		0x01	/* Write status register 1 byte */

#define SPINOR_OP_READ		0x03	/* Read data bytes (low frequency) */

#define SPINOR_OP_READ_FAST	0x0b	/* Read data bytes (high frequency) */

#define SPINOR_OP_READ_1_1_2	0x3b	/* Read data bytes (Dual SPI) */

#define SPINOR_OP_READ_1_1_4	0x6b	/* Read data bytes (Quad SPI) */

#define SPINOR_OP_READ_1_1_2	0x3b	/* Read data bytes (Dual Output SPI) */

#define SPINOR_OP_READ_1_2_2	0xbb	/* Read data bytes (Dual I/O SPI) */

#define SPINOR_OP_READ_1_1_4	0x6b	/* Read data bytes (Quad Output SPI) */

#define SPINOR_OP_READ_1_4_4	0xeb	/* Read data bytes (Quad I/O SPI) */

#define SPINOR_OP_PP		0x02	/* Page program (up to 256 bytes) */

#define SPINOR_OP_PP_1_1_4	0x32	/* Quad page program */

#define SPINOR_OP_PP_1_4_4	0x38	/* Quad page program */

#define SPINOR_OP_BE_4K		0x20	/* Erase 4KiB block */

#define SPINOR_OP_BE_4K_PMC	0xd7	/* Erase 4KiB block on PMC chips */

#define SPINOR_OP_BE_32K	0x52	/* Erase 32KiB block */
@@ -56,11 +60,17 @@ 
#define SPINOR_OP_RDFSR		0x70	/* Read flag status register */



/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */

#define SPINOR_OP_READ4		0x13	/* Read data bytes (low frequency) */

#define SPINOR_OP_READ4_FAST	0x0c	/* Read data bytes (high frequency) */

#define SPINOR_OP_READ4_1_1_2	0x3c	/* Read data bytes (Dual SPI) */

#define SPINOR_OP_READ4_1_1_4	0x6c	/* Read data bytes (Quad SPI) */

#define SPINOR_OP_READ_4B	0x13	/* Read data bytes (low frequency) */

#define SPINOR_OP_READ_FAST_4B	0x0c	/* Read data bytes (high frequency) */

#define SPINOR_OP_READ_1_1_2_4B	0x3c	/* Read data bytes (Dual Output SPI) */

#define SPINOR_OP_READ_1_2_2_4B	0xbc	/* Read data bytes (Dual I/O SPI) */

#define SPINOR_OP_READ_1_1_4_4B	0x6c	/* Read data bytes (Quad Output SPI) */

#define SPINOR_OP_READ_1_4_4_4B	0xec	/* Read data bytes (Quad I/O SPI) */

#define SPINOR_OP_PP_4B		0x12	/* Page program (up to 256 bytes) */

#define SPINOR_OP_PP_1_1_4_4B	0x34	/* Quad page program */

#define SPINOR_OP_PP_1_4_4_4B	0x3e	/* Quad page program */

#define SPINOR_OP_BE_4K_4B	0x21	/* Erase 4KiB block */

#define SPINOR_OP_BE_32K_4B	0x5c	/* Erase 32KiB block */

#define SPINOR_OP_SE_4B		0xdc	/* Sector erase (usually 64KiB) */



/* Used for SST flashes only. */