Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 900f4c16 authored by Steve Wise's avatar Steve Wise Committed by Roland Dreier
Browse files

RDMA/cxgb3: sgl/pbl offset calculation needs 64 bits



The variable 'offset' in iwch_sgl2pbl_map() needs to be a u64.

Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
parent f3b8436a
Loading
Loading
Loading
Loading
+3 −6
Original line number Original line Diff line number Diff line
@@ -195,15 +195,12 @@ static int build_inv_stag(union t3_wr *wqe, struct ib_send_wr *wr,
	return 0;
	return 0;
}
}


/*
 * TBD: this is going to be moved to firmware. Missing pdid/qpid check for now.
 */
static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list,
static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list,
			    u32 num_sgle, u32 * pbl_addr, u8 * page_size)
			    u32 num_sgle, u32 * pbl_addr, u8 * page_size)
{
{
	int i;
	int i;
	struct iwch_mr *mhp;
	struct iwch_mr *mhp;
	u32 offset;
	u64 offset;
	for (i = 0; i < num_sgle; i++) {
	for (i = 0; i < num_sgle; i++) {


		mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8);
		mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8);
@@ -235,8 +232,8 @@ static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list,
			return -EINVAL;
			return -EINVAL;
		}
		}
		offset = sg_list[i].addr - mhp->attr.va_fbo;
		offset = sg_list[i].addr - mhp->attr.va_fbo;
		offset += ((u32) mhp->attr.va_fbo) %
		offset += mhp->attr.va_fbo &
		          (1UL << (12 + mhp->attr.page_size));
			  ((1UL << (12 + mhp->attr.page_size)) - 1);
		pbl_addr[i] = ((mhp->attr.pbl_addr -
		pbl_addr[i] = ((mhp->attr.pbl_addr -
			        rhp->rdev.rnic_info.pbl_base) >> 3) +
			        rhp->rdev.rnic_info.pbl_base) >> 3) +
			      (offset >> (12 + mhp->attr.page_size));
			      (offset >> (12 + mhp->attr.page_size));