Loading drivers/media/platform/msm/vidc/msm_vidc_clocks.c +30 −8 Original line number Diff line number Diff line Loading @@ -816,8 +816,8 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, { struct msm_vidc_inst *temp; struct msm_vidc_core *core; unsigned long max_freq, freq_left, ops_left, load, cycles, freq = 0; unsigned long mbs_per_second; unsigned long max_freq, freq_left, op_rate_possible, load, cycles; unsigned long mbs_per_second, freq_core0 = 0, freq_core1 = 0, freq; int rc = 0; u32 curr_operating_rate = 0; Loading @@ -826,7 +826,13 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; curr_operating_rate = inst->clk_data.operating_rate >> 16; curr_operating_rate = max(inst->clk_data.operating_rate >> 16, inst->prop.fps); operating_rate = operating_rate >> 16; /* always allow decreasing operating rate*/ if (curr_operating_rate >= operating_rate) return 0; mutex_lock(&core->lock); max_freq = msm_vidc_max_freq(core); Loading @@ -836,10 +842,24 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, temp->state >= MSM_VIDC_RELEASE_RESOURCES_DONE) continue; freq += temp->clk_data.min_freq; if (temp->clk_data.core_id == VIDC_CORE_ID_1) freq_core0 += temp->clk_data.min_freq; else if (temp->clk_data.core_id == VIDC_CORE_ID_2) freq_core1 += temp->clk_data.min_freq; else if (temp->clk_data.core_id == VIDC_CORE_ID_3) { freq_core0 += temp->clk_data.min_freq; freq_core1 += temp->clk_data.min_freq; } } if (inst->clk_data.core_id == VIDC_CORE_ID_1) freq = freq_core0; else if (inst->clk_data.core_id == VIDC_CORE_ID_2) freq = freq_core1; else freq = max(freq_core0, freq_core1); freq_left = max_freq - freq; freq_left = max_freq > freq ? max_freq - freq : 0; mbs_per_second = msm_comm_get_inst_load_per_core(inst, LOAD_CALC_NO_QUIRKS); Loading @@ -850,13 +870,15 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, inst->clk_data.entry->low_power_cycles : cycles; if (inst->clk_data.work_route) cycles /= inst->clk_data.work_route; load = cycles * mbs_per_second; ops_left = load ? (freq_left / load) : 0; op_rate_possible = load ? (freq_left * curr_operating_rate / load) : 0; operating_rate = operating_rate >> 16; if ((curr_operating_rate * (1 + ops_left)) >= operating_rate || if (op_rate_possible >= operating_rate || msm_vidc_clock_voting || inst->clk_data.buffer_counter < DCVS_FTB_WINDOW) { dprintk(VIDC_DBG, Loading Loading
drivers/media/platform/msm/vidc/msm_vidc_clocks.c +30 −8 Original line number Diff line number Diff line Loading @@ -816,8 +816,8 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, { struct msm_vidc_inst *temp; struct msm_vidc_core *core; unsigned long max_freq, freq_left, ops_left, load, cycles, freq = 0; unsigned long mbs_per_second; unsigned long max_freq, freq_left, op_rate_possible, load, cycles; unsigned long mbs_per_second, freq_core0 = 0, freq_core1 = 0, freq; int rc = 0; u32 curr_operating_rate = 0; Loading @@ -826,7 +826,13 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, return -EINVAL; } core = inst->core; curr_operating_rate = inst->clk_data.operating_rate >> 16; curr_operating_rate = max(inst->clk_data.operating_rate >> 16, inst->prop.fps); operating_rate = operating_rate >> 16; /* always allow decreasing operating rate*/ if (curr_operating_rate >= operating_rate) return 0; mutex_lock(&core->lock); max_freq = msm_vidc_max_freq(core); Loading @@ -836,10 +842,24 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, temp->state >= MSM_VIDC_RELEASE_RESOURCES_DONE) continue; freq += temp->clk_data.min_freq; if (temp->clk_data.core_id == VIDC_CORE_ID_1) freq_core0 += temp->clk_data.min_freq; else if (temp->clk_data.core_id == VIDC_CORE_ID_2) freq_core1 += temp->clk_data.min_freq; else if (temp->clk_data.core_id == VIDC_CORE_ID_3) { freq_core0 += temp->clk_data.min_freq; freq_core1 += temp->clk_data.min_freq; } } if (inst->clk_data.core_id == VIDC_CORE_ID_1) freq = freq_core0; else if (inst->clk_data.core_id == VIDC_CORE_ID_2) freq = freq_core1; else freq = max(freq_core0, freq_core1); freq_left = max_freq - freq; freq_left = max_freq > freq ? max_freq - freq : 0; mbs_per_second = msm_comm_get_inst_load_per_core(inst, LOAD_CALC_NO_QUIRKS); Loading @@ -850,13 +870,15 @@ int msm_vidc_validate_operating_rate(struct msm_vidc_inst *inst, inst->clk_data.entry->low_power_cycles : cycles; if (inst->clk_data.work_route) cycles /= inst->clk_data.work_route; load = cycles * mbs_per_second; ops_left = load ? (freq_left / load) : 0; op_rate_possible = load ? (freq_left * curr_operating_rate / load) : 0; operating_rate = operating_rate >> 16; if ((curr_operating_rate * (1 + ops_left)) >= operating_rate || if (op_rate_possible >= operating_rate || msm_vidc_clock_voting || inst->clk_data.buffer_counter < DCVS_FTB_WINDOW) { dprintk(VIDC_DBG, Loading