Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8f9d0014 authored by Jeyaprakash Soundrapandian's avatar Jeyaprakash Soundrapandian Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add src clk name & control tags for sm8150" into dev/msm-4.14-camx

parents 98d9f67e 8ac1f0e5

arch/arm64/boot/dts/qcom/sm8150-camera.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ 
			"csiphy0_clk",

			"csi0phytimer_clk_src",

			"csi0phytimer_clk";

		src-clock-name = "csi0phytimer_clk_src";

		clock-cntl-level = "turbo";

		clock-rates =

			<400000000 0 300000000 0>;
@@ -63,6 +64,7 @@ 
			"csiphy1_clk",

			"csi1phytimer_clk_src",

			"csi1phytimer_clk";

		src-clock-name = "csi1phytimer_clk_src";

		clock-cntl-level = "turbo";

		clock-rates =

			<400000000 0 300000000 0>;
@@ -90,6 +92,7 @@ 
			"csiphy2_clk",

			"csi2phytimer_clk_src",

			"csi2phytimer_clk";

		src-clock-name = "csi2phytimer_clk_src";

		clock-cntl-level = "turbo";

		clock-rates =

			<400000000 0 300000000 0>;
@@ -116,6 +119,7 @@ 
			"csiphy3_clk",

			"csi3phytimer_clk_src",

			"csi3phytimer_clk";

		src-clock-name = "csi3phytimer_clk_src";

		clock-cntl-level = "turbo";

		clock-rates =

			<400000000 0 300000000 0>;
@@ -735,6 +739,7 @@ 
			<600000000 0 0 0 760000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -763,6 +768,7 @@ 
			<760000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-control-debugfs = "true";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;

		clock-rates-option = <760000000>;
@@ -802,6 +808,7 @@ 
			<600000000 0 0 0 760000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -830,6 +837,7 @@ 
			<760000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-control-debugfs = "true";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>;

		clock-rates-option = <760000000>;
@@ -866,6 +874,7 @@ 
			<600000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -891,6 +900,7 @@ 
			<600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -924,6 +934,7 @@ 
			<600000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_csid_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -949,6 +960,7 @@ 
			<600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-control-debugfs = "true";

		status = "ok";

	};
@@ -1011,6 +1023,7 @@ 
			"ipe_0_clk_src",

			"ipe_0_clk";

		src-clock-name = "ipe_0_clk_src";

		clock-control-debugfs = "true";

		clocks =

			<&clock_camcc CAM_CC_IPE_0_AHB_CLK>,

			<&clock_camcc CAM_CC_IPE_0_AREG_CLK>,
@@ -1043,6 +1056,7 @@ 
			"ipe_1_clk_src",

			"ipe_1_clk";

		src-clock-name = "ipe_1_clk_src";

		clock-control-debugfs = "true";

		clocks =

			<&clock_camcc CAM_CC_IPE_1_AHB_CLK>,

			<&clock_camcc CAM_CC_IPE_1_AREG_CLK>,
@@ -1075,6 +1089,7 @@ 
			"bps_clk_src",

			"bps_clk";

		src-clock-name = "bps_clk_src";

		clock-control-debugfs = "true";

		clocks =

			<&clock_camcc CAM_CC_BPS_AHB_CLK>,

			<&clock_camcc CAM_CC_BPS_AREG_CLK>,
@@ -1174,6 +1189,7 @@ 
			<&clock_camcc CAM_CC_FD_CORE_CLK>,

			<&clock_camcc CAM_CC_FD_CORE_UAR_CLK>;

		src-clock-name = "fd_core_clk_src";

		clock-control-debugfs = "true";

		clock-cntl-level = "svs", "svs_l1", "turbo";

		clock-rates =

			<400000000 0 0>,