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Commit 8f73b278 authored by Charan Teja Reddy's avatar Charan Teja Reddy
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ARM: dts: msm: correct interrupt lines of gfx smmu on qcs405 



Correct the interrupt lines of context banks of graphics SMMU on QCS405.
These are used  by a context bank to report any error to CPU.

Change-Id: I6158ef9b72af5177c6584ce16a5a3bec26bd48e9
Signed-off-by: default avatarCharan Teja Reddy <charante@codeaurora.org>
parent 2cbcc095

arch/arm64/boot/dts/qcom/msm-arm-smmu-qcs405.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -28,10 +28,10 @@ 
		#size-cells = <1>;

		#address-cells = <1>;

		ranges;

		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&clock_gcc GCC_SMMU_CFG_CLK>,

				<&clock_gcc GCC_GFX_TCU_CLK>;

		clock-names = "iface_clk", "core_clk";