Loading drivers/gpu/drm/msm/msm_drv.h +3 −1 Original line number Diff line number Diff line Loading @@ -657,7 +657,8 @@ void msm_atomic_state_clear(struct drm_atomic_state *state); void msm_atomic_state_free(struct drm_atomic_state *state); void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt); struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags); int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt, int npages, unsigned int flags); Loading Loading @@ -785,6 +786,7 @@ void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size, struct drm_gem_object **bo, uint64_t *iova); struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct dma_buf *dmabuf, struct sg_table *sgt); int msm_gem_delayed_import(struct drm_gem_object *obj); void msm_framebuffer_set_kmap(struct drm_framebuffer *fb, bool enable); void msm_framebuffer_set_keepattrs(struct drm_framebuffer *fb, bool enable); Loading drivers/gpu/drm/msm/msm_gem.c +98 −5 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include <linux/shmem_fs.h> #include <linux/dma-buf.h> #include <linux/pfn_t.h> #include <linux/ion.h> #include "msm_drv.h" #include "msm_fence.h" Loading Loading @@ -381,7 +382,8 @@ static void put_iova(struct drm_gem_object *obj) WARN_ON(!mutex_is_locked(&msm_obj->lock)); list_for_each_entry_safe(vma, tmp, &msm_obj->vmas, list) { msm_gem_unmap_vma(vma->aspace, vma, msm_obj->sgt); msm_gem_unmap_vma(vma->aspace, vma, msm_obj->sgt, msm_obj->flags); /* * put_iova removes the domain connected to the obj which makes * the aspace inaccessible. Store the aspace, as it is used to Loading Loading @@ -412,6 +414,16 @@ int msm_gem_get_iova(struct drm_gem_object *obj, if (!vma) { struct page **pages; /* perform delayed import for buffers without existing sgt */ if ((msm_obj->flags & MSM_BO_EXTBUF) && !(msm_obj->sgt)) { ret = msm_gem_delayed_import(obj); if (ret) { DRM_ERROR("delayed dma-buf import failed %d\n", ret); goto unlock; } } vma = add_vma(obj, aspace); if (IS_ERR(vma)) { ret = PTR_ERR(vma); Loading Loading @@ -1058,6 +1070,65 @@ struct drm_gem_object *msm_gem_new(struct drm_device *dev, return _msm_gem_new(dev, size, flags, false); } int msm_gem_delayed_import(struct drm_gem_object *obj) { struct dma_buf_attachment *attach; struct sg_table *sgt; struct msm_gem_object *msm_obj; uint32_t size; int npages; int ret = 0; if (!obj) { DRM_ERROR("NULL drm gem object\n"); return -EINVAL; } msm_obj = to_msm_bo(obj); if (!obj->import_attach) { DRM_ERROR("NULL dma_buf_attachment in drm gem object\n"); return -EINVAL; } attach = obj->import_attach; attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (msm_obj->flags & MSM_BO_SKIPSYNC) attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; if (msm_obj->flags & MSM_BO_KEEPATTRS) attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; /* * dma_buf_map_attachment will call dma_map_sg for ion buffer * mapping, and iova will get mapped when the function returns. */ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); if (IS_ERR(sgt)) { ret = PTR_ERR(sgt); DRM_ERROR("dma_buf_map_attachment failure, err=%d\n", ret); goto fail_import; } size = PAGE_ALIGN(attach->dmabuf->size); npages = size >> PAGE_SHIFT; msm_obj->sgt = sgt; ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); if (ret) { DRM_ERROR("fail drm_prime_sg_to_page_addr_arrays, err=%d\n", ret); goto fail_import; } fail_import: return ret; } struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct dma_buf *dmabuf, struct sg_table *sgt) { Loading @@ -1065,6 +1136,7 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct drm_gem_object *obj = NULL; uint32_t size; int ret, npages; unsigned long flags = 0; /* if we don't have IOMMU, don't bother pretending we can import: */ if (!iommu_present(&platform_bus_type)) { Loading @@ -1081,7 +1153,7 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, drm_gem_private_object_init(dev, obj, size); npages = size / PAGE_SIZE; npages = size >> PAGE_SHIFT; msm_obj = to_msm_bo(obj); mutex_lock(&msm_obj->lock); Loading @@ -1093,11 +1165,32 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, goto fail; } ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); /* * If sg table is NULL, user should call msm_gem_delayed_import to add * back the sg table to the drm gem object */ if (sgt) { ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); if (ret) { mutex_unlock(&msm_obj->lock); goto fail; } } else { msm_obj->flags |= MSM_BO_EXTBUF; } /* * For all uncached buffers, there is no need to perform cache * maintenance on dma map/unmap time. */ ret = dma_buf_get_flags(dmabuf, &flags); if (ret) { DRM_ERROR("dma_buf_get_flags failure, err=%d\n", ret); } else if ((flags & ION_FLAG_CACHED) == 0) { DRM_DEBUG("Buffer is uncached type\n"); msm_obj->flags |= MSM_BO_SKIPSYNC; } mutex_unlock(&msm_obj->lock); return obj; Loading drivers/gpu/drm/msm/msm_gem.h +4 −2 Original line number Diff line number Diff line Loading @@ -25,6 +25,8 @@ /* Additional internal-use only BO flags: */ #define MSM_BO_STOLEN 0x10000000 /* try to use stolen/splash memory */ #define MSM_BO_KEEPATTRS 0x20000000 /* keep h/w bus attributes */ #define MSM_BO_SKIPSYNC 0x40000000 /* skip dmabuf cpu sync */ #define MSM_BO_EXTBUF 0x80000000 /* indicate BO is an import buffer */ struct msm_gem_object; Loading @@ -33,7 +35,7 @@ struct msm_gem_aspace_ops { struct sg_table *sgt, int npages, unsigned int flags); void (*unmap)(struct msm_gem_address_space *, struct msm_gem_vma *, struct sg_table *sgt); struct sg_table *sgt, unsigned int flags); void (*destroy)(struct msm_gem_address_space *); void (*add_to_active)(struct msm_gem_address_space *, Loading drivers/gpu/drm/msm/msm_gem_prime.c +30 −8 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "msm_gem.h" #include <linux/dma-buf.h> #include <linux/ion.h> struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj) { Loading Loading @@ -83,9 +84,10 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf) { struct dma_buf_attachment *attach; struct sg_table *sgt; struct sg_table *sgt = NULL; struct drm_gem_object *obj; struct device *attach_dev; unsigned long flags = 0; int ret; if (!dma_buf) Loading Loading @@ -117,14 +119,32 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, get_dma_buf(dma_buf); /* * For cached buffers where CPU access is required, dma_map_attachment * must be called now to allow user-space to perform cpu sync begin/end * otherwise do delayed mapping during the commit. */ ret = dma_buf_get_flags(dma_buf, &flags); if (ret) { DRM_ERROR("dma_buf_get_flags failure, err=%d\n", ret); goto fail_put; } else if (flags & ION_FLAG_CACHED) { attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); sgt = dma_buf_map_attachment( attach, DMA_BIDIRECTIONAL); if (IS_ERR(sgt)) { ret = PTR_ERR(sgt); DRM_ERROR("dma_buf_map_attachment failure, err=%d\n", ret); DRM_ERROR( "dma_buf_map_attachment failure, err=%d\n", ret); goto fail_detach; } } /* * If importing a NULL sg table (i.e. for uncached buffers), * create a drm gem object with only the dma buf attachment. */ obj = dev->driver->gem_prime_import_sg_table(dev, attach, sgt); if (IS_ERR(obj)) { ret = PTR_ERR(obj); Loading @@ -137,9 +157,11 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, return obj; fail_unmap: if (sgt) dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); fail_detach: dma_buf_detach(dma_buf, attach); fail_put: dma_buf_put(dma_buf); return ERR_PTR(ret); Loading drivers/gpu/drm/msm/msm_gem_vma.c +8 −5 Original line number Diff line number Diff line Loading @@ -21,14 +21,15 @@ /* SDE address space operations */ static void smmu_aspace_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (!vma->iova) return; if (aspace) { aspace->mmu->funcs->unmap_dma_buf(aspace->mmu, sgt, DMA_BIDIRECTIONAL); DMA_BIDIRECTIONAL, flags); } vma->iova = 0; Loading Loading @@ -188,7 +189,8 @@ msm_gem_smmu_address_space_create(struct drm_device *dev, struct msm_mmu *mmu, /* GPU address space operations */ static void iommu_aspace_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (!aspace || !vma->iova) return; Loading Loading @@ -297,10 +299,11 @@ void msm_gem_address_space_put(struct msm_gem_address_space *aspace) void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (aspace && aspace->ops->unmap) aspace->ops->unmap(aspace, vma, sgt); aspace->ops->unmap(aspace, vma, sgt, flags); } int Loading Loading
drivers/gpu/drm/msm/msm_drv.h +3 −1 Original line number Diff line number Diff line Loading @@ -657,7 +657,8 @@ void msm_atomic_state_clear(struct drm_atomic_state *state); void msm_atomic_state_free(struct drm_atomic_state *state); void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt); struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags); int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt, int npages, unsigned int flags); Loading Loading @@ -785,6 +786,7 @@ void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size, struct drm_gem_object **bo, uint64_t *iova); struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct dma_buf *dmabuf, struct sg_table *sgt); int msm_gem_delayed_import(struct drm_gem_object *obj); void msm_framebuffer_set_kmap(struct drm_framebuffer *fb, bool enable); void msm_framebuffer_set_keepattrs(struct drm_framebuffer *fb, bool enable); Loading
drivers/gpu/drm/msm/msm_gem.c +98 −5 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include <linux/shmem_fs.h> #include <linux/dma-buf.h> #include <linux/pfn_t.h> #include <linux/ion.h> #include "msm_drv.h" #include "msm_fence.h" Loading Loading @@ -381,7 +382,8 @@ static void put_iova(struct drm_gem_object *obj) WARN_ON(!mutex_is_locked(&msm_obj->lock)); list_for_each_entry_safe(vma, tmp, &msm_obj->vmas, list) { msm_gem_unmap_vma(vma->aspace, vma, msm_obj->sgt); msm_gem_unmap_vma(vma->aspace, vma, msm_obj->sgt, msm_obj->flags); /* * put_iova removes the domain connected to the obj which makes * the aspace inaccessible. Store the aspace, as it is used to Loading Loading @@ -412,6 +414,16 @@ int msm_gem_get_iova(struct drm_gem_object *obj, if (!vma) { struct page **pages; /* perform delayed import for buffers without existing sgt */ if ((msm_obj->flags & MSM_BO_EXTBUF) && !(msm_obj->sgt)) { ret = msm_gem_delayed_import(obj); if (ret) { DRM_ERROR("delayed dma-buf import failed %d\n", ret); goto unlock; } } vma = add_vma(obj, aspace); if (IS_ERR(vma)) { ret = PTR_ERR(vma); Loading Loading @@ -1058,6 +1070,65 @@ struct drm_gem_object *msm_gem_new(struct drm_device *dev, return _msm_gem_new(dev, size, flags, false); } int msm_gem_delayed_import(struct drm_gem_object *obj) { struct dma_buf_attachment *attach; struct sg_table *sgt; struct msm_gem_object *msm_obj; uint32_t size; int npages; int ret = 0; if (!obj) { DRM_ERROR("NULL drm gem object\n"); return -EINVAL; } msm_obj = to_msm_bo(obj); if (!obj->import_attach) { DRM_ERROR("NULL dma_buf_attachment in drm gem object\n"); return -EINVAL; } attach = obj->import_attach; attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; if (msm_obj->flags & MSM_BO_SKIPSYNC) attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC; if (msm_obj->flags & MSM_BO_KEEPATTRS) attach->dma_map_attrs |= DMA_ATTR_IOMMU_USE_UPSTREAM_HINT; /* * dma_buf_map_attachment will call dma_map_sg for ion buffer * mapping, and iova will get mapped when the function returns. */ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); if (IS_ERR(sgt)) { ret = PTR_ERR(sgt); DRM_ERROR("dma_buf_map_attachment failure, err=%d\n", ret); goto fail_import; } size = PAGE_ALIGN(attach->dmabuf->size); npages = size >> PAGE_SHIFT; msm_obj->sgt = sgt; ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); if (ret) { DRM_ERROR("fail drm_prime_sg_to_page_addr_arrays, err=%d\n", ret); goto fail_import; } fail_import: return ret; } struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct dma_buf *dmabuf, struct sg_table *sgt) { Loading @@ -1065,6 +1136,7 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct drm_gem_object *obj = NULL; uint32_t size; int ret, npages; unsigned long flags = 0; /* if we don't have IOMMU, don't bother pretending we can import: */ if (!iommu_present(&platform_bus_type)) { Loading @@ -1081,7 +1153,7 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, drm_gem_private_object_init(dev, obj, size); npages = size / PAGE_SIZE; npages = size >> PAGE_SHIFT; msm_obj = to_msm_bo(obj); mutex_lock(&msm_obj->lock); Loading @@ -1093,11 +1165,32 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, goto fail; } ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); /* * If sg table is NULL, user should call msm_gem_delayed_import to add * back the sg table to the drm gem object */ if (sgt) { ret = drm_prime_sg_to_page_addr_arrays(sgt, msm_obj->pages, NULL, npages); if (ret) { mutex_unlock(&msm_obj->lock); goto fail; } } else { msm_obj->flags |= MSM_BO_EXTBUF; } /* * For all uncached buffers, there is no need to perform cache * maintenance on dma map/unmap time. */ ret = dma_buf_get_flags(dmabuf, &flags); if (ret) { DRM_ERROR("dma_buf_get_flags failure, err=%d\n", ret); } else if ((flags & ION_FLAG_CACHED) == 0) { DRM_DEBUG("Buffer is uncached type\n"); msm_obj->flags |= MSM_BO_SKIPSYNC; } mutex_unlock(&msm_obj->lock); return obj; Loading
drivers/gpu/drm/msm/msm_gem.h +4 −2 Original line number Diff line number Diff line Loading @@ -25,6 +25,8 @@ /* Additional internal-use only BO flags: */ #define MSM_BO_STOLEN 0x10000000 /* try to use stolen/splash memory */ #define MSM_BO_KEEPATTRS 0x20000000 /* keep h/w bus attributes */ #define MSM_BO_SKIPSYNC 0x40000000 /* skip dmabuf cpu sync */ #define MSM_BO_EXTBUF 0x80000000 /* indicate BO is an import buffer */ struct msm_gem_object; Loading @@ -33,7 +35,7 @@ struct msm_gem_aspace_ops { struct sg_table *sgt, int npages, unsigned int flags); void (*unmap)(struct msm_gem_address_space *, struct msm_gem_vma *, struct sg_table *sgt); struct sg_table *sgt, unsigned int flags); void (*destroy)(struct msm_gem_address_space *); void (*add_to_active)(struct msm_gem_address_space *, Loading
drivers/gpu/drm/msm/msm_gem_prime.c +30 −8 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "msm_gem.h" #include <linux/dma-buf.h> #include <linux/ion.h> struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj) { Loading Loading @@ -83,9 +84,10 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf) { struct dma_buf_attachment *attach; struct sg_table *sgt; struct sg_table *sgt = NULL; struct drm_gem_object *obj; struct device *attach_dev; unsigned long flags = 0; int ret; if (!dma_buf) Loading Loading @@ -117,14 +119,32 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, get_dma_buf(dma_buf); /* * For cached buffers where CPU access is required, dma_map_attachment * must be called now to allow user-space to perform cpu sync begin/end * otherwise do delayed mapping during the commit. */ ret = dma_buf_get_flags(dma_buf, &flags); if (ret) { DRM_ERROR("dma_buf_get_flags failure, err=%d\n", ret); goto fail_put; } else if (flags & ION_FLAG_CACHED) { attach->dma_map_attrs |= DMA_ATTR_DELAYED_UNMAP; sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); sgt = dma_buf_map_attachment( attach, DMA_BIDIRECTIONAL); if (IS_ERR(sgt)) { ret = PTR_ERR(sgt); DRM_ERROR("dma_buf_map_attachment failure, err=%d\n", ret); DRM_ERROR( "dma_buf_map_attachment failure, err=%d\n", ret); goto fail_detach; } } /* * If importing a NULL sg table (i.e. for uncached buffers), * create a drm gem object with only the dma buf attachment. */ obj = dev->driver->gem_prime_import_sg_table(dev, attach, sgt); if (IS_ERR(obj)) { ret = PTR_ERR(obj); Loading @@ -137,9 +157,11 @@ struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, return obj; fail_unmap: if (sgt) dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); fail_detach: dma_buf_detach(dma_buf, attach); fail_put: dma_buf_put(dma_buf); return ERR_PTR(ret); Loading
drivers/gpu/drm/msm/msm_gem_vma.c +8 −5 Original line number Diff line number Diff line Loading @@ -21,14 +21,15 @@ /* SDE address space operations */ static void smmu_aspace_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (!vma->iova) return; if (aspace) { aspace->mmu->funcs->unmap_dma_buf(aspace->mmu, sgt, DMA_BIDIRECTIONAL); DMA_BIDIRECTIONAL, flags); } vma->iova = 0; Loading Loading @@ -188,7 +189,8 @@ msm_gem_smmu_address_space_create(struct drm_device *dev, struct msm_mmu *mmu, /* GPU address space operations */ static void iommu_aspace_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (!aspace || !vma->iova) return; Loading Loading @@ -297,10 +299,11 @@ void msm_gem_address_space_put(struct msm_gem_address_space *aspace) void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, struct sg_table *sgt) struct msm_gem_vma *vma, struct sg_table *sgt, unsigned int flags) { if (aspace && aspace->ops->unmap) aspace->ops->unmap(aspace, vma, sgt); aspace->ops->unmap(aspace, vma, sgt, flags); } int Loading