Loading drivers/crypto/msm/ice.c +51 −3 Original line number Diff line number Diff line Loading @@ -57,6 +57,14 @@ #define QCOM_ICE_UFS 10 #define QCOM_ICE_SDCC 20 #define QCOM_ICE_ENCRYPT 0x1 #define QCOM_ICE_DECRYPT 0x2 #define QCOM_SECT_LEN_IN_BYTE 512 #define QCOM_UD_FOOTER_SIZE 0x4000 #define QCOM_UD_FOOTER_SECS (QCOM_UD_FOOTER_SIZE / QCOM_SECT_LEN_IN_BYTE) static int ice_fde_flag; struct ice_clk_info { struct list_head list; struct clk *clk; Loading Loading @@ -130,13 +138,14 @@ static int qti_ice_setting_config(struct request *req, return -EINVAL; if ((short)(crypto_data->key_index) >= 0) { memcpy(&setting->crypto_data, crypto_data, sizeof(setting->crypto_data)); if (rq_data_dir(req) == WRITE) if (rq_data_dir(req) == WRITE && (ice_fde_flag & QCOM_ICE_ENCRYPT)) setting->encr_bypass = false; else if (rq_data_dir(req) == READ) else if (rq_data_dir(req) == READ && (ice_fde_flag & QCOM_ICE_DECRYPT)) setting->decr_bypass = false; else { /* Should I say BUG_ON */ Loading @@ -147,6 +156,12 @@ static int qti_ice_setting_config(struct request *req, return 0; } void qcom_ice_set_fde_flag(int flag) { ice_fde_flag = flag; pr_debug("%s read_write setting %d\n", __func__, ice_fde_flag); } EXPORT_SYMBOL(qcom_ice_set_fde_flag); static int qcom_ice_enable_clocks(struct ice_device *, bool); Loading Loading @@ -1431,8 +1446,11 @@ static int qcom_ice_config_start(struct platform_device *pdev, struct ice_data_setting *setting, bool async) { struct ice_crypto_setting pfk_crypto_data = {0}; struct ice_crypto_setting ice_data = {0}; int ret = 0; bool is_pfe = false; unsigned long sec_end = 0; sector_t data_size; if (!pdev || !req) { pr_err("%s: Invalid params passed\n", __func__); Loading Loading @@ -1467,6 +1485,36 @@ static int qcom_ice_config_start(struct platform_device *pdev, &pfk_crypto_data, setting); } if (ice_fde_flag && req->part && req->part->info && req->part->info->volname[0]) { if (!strcmp(req->part->info->volname, "userdata")) { sec_end = req->part->start_sect + req->part->nr_sects - QCOM_UD_FOOTER_SECS; if ((req->__sector >= req->part->start_sect) && (req->__sector < sec_end)) { /* * Ugly hack to address non-block-size aligned * userdata end address in eMMC based devices. * for eMMC based devices, since sector and * block sizes are not same i.e. 4K, it is * possible that partition is not a multiple of * block size. For UFS based devices sector * size and block size are same. Hence ensure * that data is within userdata partition using * sector based calculation */ data_size = req->__data_len / QCOM_SECT_LEN_IN_BYTE; if ((req->__sector + data_size) > sec_end) return 0; else return qti_ice_setting_config(req, pdev, &ice_data, setting); } } } /* * It is not an error. If target is not req-crypt based, all request * from storage driver would come here to check if there is any ICE Loading drivers/misc/qseecom.c +11 −0 Original line number Diff line number Diff line Loading @@ -7648,6 +7648,17 @@ static inline long qseecom_ioctl(struct file *file, atomic_dec(&data->ioctl_count); break; } case QSEECOM_IOCTL_SET_ICE_INFO: { struct qseecom_ice_data_t ice_data; ret = copy_from_user(&ice_data, argp, sizeof(ice_data)); if (ret) { pr_err("copy_from_user failed\n"); return -EFAULT; } qcom_ice_set_fde_flag(ice_data.flag); break; } default: pr_err("Invalid IOCTL: 0x%x\n", cmd); return -EINVAL; Loading include/crypto/ice.h +3 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -56,11 +56,13 @@ struct platform_device *qcom_ice_get_pdevice(struct device_node *node); #ifdef CONFIG_CRYPTO_DEV_QCOM_ICE int qcom_ice_setup_ice_hw(const char *storage_type, int enable); void qcom_ice_set_fde_flag(int flag); #else static inline int qcom_ice_setup_ice_hw(const char *storage_type, int enable) { return 0; } static inline void qcom_ice_set_fde_flag(int flag) {} #endif struct qcom_ice_variant_ops { Loading include/uapi/linux/qseecom.h +6 −0 Original line number Diff line number Diff line Loading @@ -268,6 +268,10 @@ struct qseecom_ce_pipe_entry { unsigned int ce_pipe_pair; }; struct qseecom_ice_data_t { int flag; }; #define MAX_CE_INFO_HANDLE_SIZE 32 struct qseecom_ce_info_req { unsigned char handle[MAX_CE_INFO_HANDLE_SIZE]; Loading Loading @@ -385,5 +389,7 @@ struct file; #define QSEECOM_IOCTL_QUERY_CE_PIPE_INFO \ _IOWR(QSEECOM_IOC_MAGIC, 42, struct qseecom_ce_info_req) #define QSEECOM_IOCTL_SET_ICE_INFO \ _IOWR(QSEECOM_IOC_MAGIC, 43, struct qseecom_ice_data_t) #endif /* _UAPI_QSEECOM_H_ */ Loading
drivers/crypto/msm/ice.c +51 −3 Original line number Diff line number Diff line Loading @@ -57,6 +57,14 @@ #define QCOM_ICE_UFS 10 #define QCOM_ICE_SDCC 20 #define QCOM_ICE_ENCRYPT 0x1 #define QCOM_ICE_DECRYPT 0x2 #define QCOM_SECT_LEN_IN_BYTE 512 #define QCOM_UD_FOOTER_SIZE 0x4000 #define QCOM_UD_FOOTER_SECS (QCOM_UD_FOOTER_SIZE / QCOM_SECT_LEN_IN_BYTE) static int ice_fde_flag; struct ice_clk_info { struct list_head list; struct clk *clk; Loading Loading @@ -130,13 +138,14 @@ static int qti_ice_setting_config(struct request *req, return -EINVAL; if ((short)(crypto_data->key_index) >= 0) { memcpy(&setting->crypto_data, crypto_data, sizeof(setting->crypto_data)); if (rq_data_dir(req) == WRITE) if (rq_data_dir(req) == WRITE && (ice_fde_flag & QCOM_ICE_ENCRYPT)) setting->encr_bypass = false; else if (rq_data_dir(req) == READ) else if (rq_data_dir(req) == READ && (ice_fde_flag & QCOM_ICE_DECRYPT)) setting->decr_bypass = false; else { /* Should I say BUG_ON */ Loading @@ -147,6 +156,12 @@ static int qti_ice_setting_config(struct request *req, return 0; } void qcom_ice_set_fde_flag(int flag) { ice_fde_flag = flag; pr_debug("%s read_write setting %d\n", __func__, ice_fde_flag); } EXPORT_SYMBOL(qcom_ice_set_fde_flag); static int qcom_ice_enable_clocks(struct ice_device *, bool); Loading Loading @@ -1431,8 +1446,11 @@ static int qcom_ice_config_start(struct platform_device *pdev, struct ice_data_setting *setting, bool async) { struct ice_crypto_setting pfk_crypto_data = {0}; struct ice_crypto_setting ice_data = {0}; int ret = 0; bool is_pfe = false; unsigned long sec_end = 0; sector_t data_size; if (!pdev || !req) { pr_err("%s: Invalid params passed\n", __func__); Loading Loading @@ -1467,6 +1485,36 @@ static int qcom_ice_config_start(struct platform_device *pdev, &pfk_crypto_data, setting); } if (ice_fde_flag && req->part && req->part->info && req->part->info->volname[0]) { if (!strcmp(req->part->info->volname, "userdata")) { sec_end = req->part->start_sect + req->part->nr_sects - QCOM_UD_FOOTER_SECS; if ((req->__sector >= req->part->start_sect) && (req->__sector < sec_end)) { /* * Ugly hack to address non-block-size aligned * userdata end address in eMMC based devices. * for eMMC based devices, since sector and * block sizes are not same i.e. 4K, it is * possible that partition is not a multiple of * block size. For UFS based devices sector * size and block size are same. Hence ensure * that data is within userdata partition using * sector based calculation */ data_size = req->__data_len / QCOM_SECT_LEN_IN_BYTE; if ((req->__sector + data_size) > sec_end) return 0; else return qti_ice_setting_config(req, pdev, &ice_data, setting); } } } /* * It is not an error. If target is not req-crypt based, all request * from storage driver would come here to check if there is any ICE Loading
drivers/misc/qseecom.c +11 −0 Original line number Diff line number Diff line Loading @@ -7648,6 +7648,17 @@ static inline long qseecom_ioctl(struct file *file, atomic_dec(&data->ioctl_count); break; } case QSEECOM_IOCTL_SET_ICE_INFO: { struct qseecom_ice_data_t ice_data; ret = copy_from_user(&ice_data, argp, sizeof(ice_data)); if (ret) { pr_err("copy_from_user failed\n"); return -EFAULT; } qcom_ice_set_fde_flag(ice_data.flag); break; } default: pr_err("Invalid IOCTL: 0x%x\n", cmd); return -EINVAL; Loading
include/crypto/ice.h +3 −1 Original line number Diff line number Diff line /* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -56,11 +56,13 @@ struct platform_device *qcom_ice_get_pdevice(struct device_node *node); #ifdef CONFIG_CRYPTO_DEV_QCOM_ICE int qcom_ice_setup_ice_hw(const char *storage_type, int enable); void qcom_ice_set_fde_flag(int flag); #else static inline int qcom_ice_setup_ice_hw(const char *storage_type, int enable) { return 0; } static inline void qcom_ice_set_fde_flag(int flag) {} #endif struct qcom_ice_variant_ops { Loading
include/uapi/linux/qseecom.h +6 −0 Original line number Diff line number Diff line Loading @@ -268,6 +268,10 @@ struct qseecom_ce_pipe_entry { unsigned int ce_pipe_pair; }; struct qseecom_ice_data_t { int flag; }; #define MAX_CE_INFO_HANDLE_SIZE 32 struct qseecom_ce_info_req { unsigned char handle[MAX_CE_INFO_HANDLE_SIZE]; Loading Loading @@ -385,5 +389,7 @@ struct file; #define QSEECOM_IOCTL_QUERY_CE_PIPE_INFO \ _IOWR(QSEECOM_IOC_MAGIC, 42, struct qseecom_ce_info_req) #define QSEECOM_IOCTL_SET_ICE_INFO \ _IOWR(QSEECOM_IOC_MAGIC, 43, struct qseecom_ice_data_t) #endif /* _UAPI_QSEECOM_H_ */