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Commit 8d86cfc2 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Merge remote-tracking branch 'remotes/origin/tmp-c50e5cb3' into msm-4.14"

parents 1ec39dc7 8cfb7334

Documentation/virtual/kvm/api.txt

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@@ -1940,6 +1940,9 @@ ARM 32-bit VFP control registers have the following id bit patterns: 
ARM 64-bit FP registers have the following id bit patterns:

  0x4030 0000 0012 0 <regno:12>



ARM firmware pseudo-registers have the following bit pattern:

  0x4030 0000 0014 <regno:16>





arm64 registers are mapped using the lower 32 bits. The upper 16 of

that is the register group type, or coprocessor number:
@@ -1956,6 +1959,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value: 
arm64 system registers have the following id bit patterns:

  0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>



arm64 firmware pseudo-registers have the following bit pattern:

  0x6030 0000 0014 <regno:16>





MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is

the register group type:
@@ -2490,7 +2496,8 @@ Possible features: 
	  and execute guest code when KVM_RUN is called.

	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.

	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision

          backward compatible with v0.2) for the CPU.

	  Depends on KVM_CAP_ARM_PSCI_0_2.

	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.

	  Depends on KVM_CAP_ARM_PMU_V3.

Documentation/virtual/kvm/arm/psci.txt

0 → 100644
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KVM implements the PSCI (Power State Coordination Interface)

specification in order to provide services such as CPU on/off, reset

and power-off to the guest.



The PSCI specification is regularly updated to provide new features,

and KVM implements these updates if they make sense from a virtualization

point of view.



This means that a guest booted on two different versions of KVM can

observe two different "firmware" revisions. This could cause issues if

a given guest is tied to a particular PSCI revision (unlikely), or if

a migration causes a different PSCI version to be exposed out of the

blue to an unsuspecting guest.



In order to remedy this situation, KVM exposes a set of "firmware

pseudo-registers" that can be manipulated using the GET/SET_ONE_REG

interface. These registers can be saved/restored by userspace, and set

to a convenient value if required.



The following register is defined:



* KVM_REG_ARM_PSCI_VERSION:



  - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set

    (and thus has already been initialized)

  - Returns the current PSCI version on GET_ONE_REG (defaulting to the

    highest PSCI version implemented by KVM and compatible with v0.2)

  - Allows any PSCI version implemented by KVM and compatible with

    v0.2 to be set with SET_ONE_REG

  - Affects the whole VM (even if the register view is per-vcpu)

Makefile

+1 −1
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# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 14

SUBLEVEL = 38

SUBLEVEL = 39

EXTRAVERSION =

NAME = Petit Gorille

arch/arm/configs/socfpga_defconfig

+1 −0
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@@ -57,6 +57,7 @@ CONFIG_MTD_M25P80=y 
CONFIG_MTD_NAND=y

CONFIG_MTD_NAND_DENALI_DT=y

CONFIG_MTD_SPI_NOR=y

# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set

CONFIG_SPI_CADENCE_QUADSPI=y

CONFIG_OF_OVERLAY=y

CONFIG_OF_CONFIGFS=y

arch/arm/include/asm/kvm_host.h

+3 −0
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@@ -75,6 +75,9 @@ struct kvm_arch { 
	/* Interrupt controller */

	struct vgic_dist	vgic;

	int max_vcpus;



	/* Mandated version of PSCI */

	u32 psci_version;

};



#define KVM_NR_MEM_OBJS     40