Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8d28aab5 authored by Jeremy Fitzhardinge's avatar Jeremy Fitzhardinge Committed by Ingo Molnar
Browse files

x86_64: add pseudo-features for 32-bit compat syscall 



Add pseudo-feature bits to describe whether the CPU supports sysenter
and/or syscall from ia32-compat userspace.  This removes a hardcoded
test in vdso32-setup.

Signed-off-by: default avatarJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 3d0decc4

arch/x86/kernel/cpu/centaur_64.c

+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) 
{

	if (c->x86 == 0x6 && c->x86_model >= 0xf)

		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);



	set_cpu_cap(c, X86_FEATURE_SYSENTER32);

}



static void __cpuinit init_centaur(struct cpuinfo_x86 *c)

arch/x86/kernel/cpu/common_64.c

+3 −0
Original line number Diff line number Diff line
@@ -314,6 +314,9 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) 
	if (c->extended_cpuid_level >= 0x80000007)

		c->x86_power = cpuid_edx(0x80000007);



	/* Assume all 64-bit CPUs support 32-bit syscall */

	set_cpu_cap(c, X86_FEATURE_SYSCALL32);



	if (c->x86_vendor != X86_VENDOR_UNKNOWN &&

	    cpu_devs[c->x86_vendor]->c_early_init)

		cpu_devs[c->x86_vendor]->c_early_init(c);

arch/x86/kernel/cpu/intel_64.c

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) 
	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||

	    (c->x86 == 0x6 && c->x86_model >= 0x0e))

		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);



	set_cpu_cap(c, X86_FEATURE_SYSENTER32);

}



/*

include/asm-x86/cpufeature.h

+2 −2
Original line number Diff line number Diff line
@@ -74,8 +74,8 @@ 
#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */

#define X86_FEATURE_PEBS	(3*32+12)  /* Precise-Event Based Sampling */

#define X86_FEATURE_BTS		(3*32+13)  /* Branch Trace Store */

/* 14 free */

/* 15 free */

#define X86_FEATURE_SYSCALL32	(3*32+14)  /* syscall in ia32 userspace */

#define X86_FEATURE_SYSENTER32	(3*32+15)  /* sysenter in ia32 userspace */

#define X86_FEATURE_REP_GOOD	(3*32+16) /* rep microcode works well on this CPU */

#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */

#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */