Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8c6bda1a authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
Browse files

[TG3]: Fix tg3_set_power_state() 



Fix tg3_set_power_state to drive GPIOs properly based on the
TG3_FLAG_EEPROM_WRITE_PROTECT flag. Some delays are also added after D0
and D3 power state changes.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 314fba34

drivers/net/tg3.c

+8 −2
Original line number Original line Diff line number Diff line
@@ -1005,8 +1005,13 @@ static int tg3_set_power_state(struct tg3 *tp, int state) 
		pci_write_config_word(tp->pdev,

		pci_write_config_word(tp->pdev,

				      pm + PCI_PM_CTRL,

				      pm + PCI_PM_CTRL,

				      power_control);

				      power_control);

		udelay(100);	/* Delay after power state change */



		/* Switch out of Vaux if it is not a LOM */

		if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) {

			tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);

			tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);

			udelay(100);

			udelay(100);

		}





		return 0;

		return 0;
@@ -1151,6 +1156,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state) 




	/* Finally, set the new power state. */

	/* Finally, set the new power state. */

	pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);

	pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);

	udelay(100);	/* Delay after power state change */





	tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);

	tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);