Loading arch/arm64/boot/dts/qcom/trinket.dtsi +131 −28 Original line number Diff line number Diff line Loading @@ -26,6 +26,8 @@ #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) #define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;} #define DDR_TYPE_LPDDR3 5 #define DDR_TYPE_LPDDR4X 7 / { model = "Qualcomm Technologies, Inc. TRINKET"; Loading Loading @@ -2475,7 +2477,7 @@ status = "ok"; }; ddr_bw_opp_table: ddr-bw-opp-table { ddr4_bw_opp_table: ddr4-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ Loading @@ -2489,7 +2491,7 @@ BW_OPP_ENTRY(1804, 8); /*13763 MB/s */ }; suspendable_ddr_bw_opp_table: suspendable-ddr-bw-opp-table { suspendable_ddr4_bw_opp_table: suspendable-ddr4-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 0, 8); /* 0 MB/s */ BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ Loading @@ -2504,13 +2506,43 @@ BW_OPP_ENTRY(1804, 8); /*13763 MB/s */ }; ddr3_bw_opp_table: ddr3-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ BW_OPP_ENTRY( 451, 8); /* 3440 MB/s */ BW_OPP_ENTRY( 547, 8); /* 4173 MB/s */ BW_OPP_ENTRY( 681, 8); /* 5195 MB/s */ BW_OPP_ENTRY( 768, 8); /* 5859 MB/s */ BW_OPP_ENTRY( 931, 8); /* 7102 MB/s */ }; suspendable_ddr3_bw_opp_table: suspendable-ddr3-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 0, 8); /* 0 MB/s */ BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ BW_OPP_ENTRY( 451, 8); /* 3440 MB/s */ BW_OPP_ENTRY( 547, 8); /* 4173 MB/s */ BW_OPP_ENTRY( 681, 8); /* 5195 MB/s */ BW_OPP_ENTRY( 768, 8); /* 5859 MB/s */ BW_OPP_ENTRY( 931, 8); /* 7102 MB/s */ }; cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { compatible = "qcom,devbw"; governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu_cpu_ddr_bwmon: qcom,cpu-cpu-ddr-bwmon@01b8e200 { Loading @@ -2530,7 +2562,14 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu0_cpu_ddr_latmon: qcom,cpu0-cpu-ddr-latmon { Loading @@ -2539,12 +2578,22 @@ qcom,target-dev = <&cpu0_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0xE7>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 864000 MHZ_TO_MBPS(200, 8) >, < 1305600 MHZ_TO_MBPS(451, 8) >, < 1804800 MHZ_TO_MBPS(768, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 864000 MHZ_TO_MBPS( 300, 8) >, < 1305600 MHZ_TO_MBPS( 547, 8) >, < 1420000 MHZ_TO_MBPS( 768, 8) >, < 1804800 MHZ_TO_MBPS(1017, 8) >; }; }; cpu4_cpu_ddr_lat: qcom,cpu4-cpu-ddr-lat { compatible = "qcom,devbw"; Loading @@ -2552,7 +2601,14 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu4_cpu_ddr_latmon: qcom,cpu4-cpu-ddr-latmon { Loading @@ -2561,12 +2617,23 @@ qcom,target-dev = <&cpu4_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0x24>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 1056000 MHZ_TO_MBPS(200, 8) >, < 1401600 MHZ_TO_MBPS(451, 8) >, < 1804800 MHZ_TO_MBPS(768, 8) >, < 2016000 MHZ_TO_MBPS(931, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 902400 MHZ_TO_MBPS( 451, 8) >, < 1401600 MHZ_TO_MBPS(1017, 8) >, < 1804800 MHZ_TO_MBPS(1555, 8) >, < 2016000 MHZ_TO_MBPS(1804, 8) >; }; }; cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor { compatible = "qcom,devbw"; Loading @@ -2574,19 +2641,36 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu0_computemon: qcom,cpu0-computemon { compatible = "qcom,arm-cpu-mon"; qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; qcom,target-dev = <&cpu0_cpu_ddr_latfloor>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 614400 MHZ_TO_MBPS( 200, 8) >, < 1305600 MHZ_TO_MBPS( 451, 8) >, < 1804800 MHZ_TO_MBPS( 768, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 614400 MHZ_TO_MBPS( 300, 8) >, < 1017600 MHZ_TO_MBPS( 451, 8) >, < 1420000 MHZ_TO_MBPS( 547, 8) >, < 1804800 MHZ_TO_MBPS( 768, 8) >; }; }; cpu4_cpu_ddr_latfloor: qcom,cpu4-cpu-ddr-latfloor { compatible = "qcom,devbw"; Loading @@ -2594,13 +2678,31 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu4_computemon: qcom,cpu4-computemon { compatible = "qcom,arm-cpu-mon"; qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_ddr_latfloor>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 652800 MHZ_TO_MBPS( 200, 8) >, < 1056000 MHZ_TO_MBPS( 451, 8) >, < 1401600 MHZ_TO_MBPS( 547, 8) >, < 1536000 MHZ_TO_MBPS( 768, 8) >, < 2016000 MHZ_TO_MBPS( 931, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 902400 MHZ_TO_MBPS( 300, 8) >, < 1056000 MHZ_TO_MBPS( 547, 8) >, Loading @@ -2608,6 +2710,7 @@ < 1804800 MHZ_TO_MBPS(1017, 8) >, < 2016000 MHZ_TO_MBPS(1804, 8) >; }; }; demux { compatible = "qcom,demux"; Loading drivers/devfreq/arm-memlat-mon.c +24 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -28,6 +28,7 @@ #include <linux/irq.h> #include <linux/cpu_pm.h> #include <linux/cpu.h> #include <linux/of_fdt.h> #include "governor.h" #include "governor_memlat.h" #include <linux/perf_event.h> Loading Loading @@ -260,6 +261,26 @@ static int get_mask_from_dev_handle(struct platform_device *pdev, return ret; } static struct device_node *parse_child_nodes(struct device *dev) { struct device_node *of_child; int ddr_type_of = -1; int ddr_type = of_fdt_get_ddrtype(); int ret; for_each_child_of_node(dev->of_node, of_child) { ret = of_property_read_u32(of_child, "qcom,ddr-type", &ddr_type_of); if (!ret && (ddr_type == ddr_type_of)) { dev_dbg(dev, "ddr-type = %d, is matching DT entry\n", ddr_type_of); return of_child; } } return NULL; } static int arm_memlat_mon_driver_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; Loading Loading @@ -305,6 +326,8 @@ static int arm_memlat_mon_driver_probe(struct platform_device *pdev) hw->start_hwmon = &start_hwmon; hw->stop_hwmon = &stop_hwmon; hw->get_cnt = &get_cnt; if (of_get_child_count(dev->of_node)) hw->get_child_of_node = &parse_child_nodes; spec = of_device_get_match_data(dev); if (spec && spec->is_compute) { Loading drivers/devfreq/devfreq_devbw.c +63 −2 Original line number Diff line number Diff line /* * Copyright (c) 2013-2014, 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2014, 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -25,7 +25,9 @@ #include <linux/mutex.h> #include <linux/interrupt.h> #include <linux/devfreq.h> #include <linux/slab.h> #include <linux/of.h> #include <linux/of_fdt.h> #include <trace/events/power.h> #include <linux/msm-bus.h> #include <linux/msm-bus-board.h> Loading Loading @@ -99,6 +101,62 @@ static int devbw_get_dev_status(struct device *dev, return 0; } #define PROP_OPERATING_POINTS_V2 "operating-points-v2" static int add_opp_prop_from_child(struct device *dev, struct device_node *of_child) { struct property *prop; int len = 0, ret = 0; void *value; const void *p_val; p_val = of_get_property(of_child, PROP_OPERATING_POINTS_V2, &len); value = devm_kzalloc(dev, len, GFP_KERNEL); if (!value) return -ENOMEM; memcpy(value, p_val, len); prop = devm_kzalloc(dev, sizeof(*prop), GFP_KERNEL); if (!prop) { devm_kfree(dev, value); return -ENOMEM; } prop->name = "operating-points-v2"; prop->value = value; prop->length = len; ret = of_add_property(dev->of_node, prop); if (ret) { devm_kfree(dev, value); devm_kfree(dev, prop); dev_err(dev, "failed to add property: %d\n", ret); } return ret; } static int parse_child_nodes_for_opp(struct device *dev) { struct device_node *of_child; int ddr_type_of = -1; int ddr_type = of_fdt_get_ddrtype(); int ret = -EINVAL; for_each_child_of_node(dev->of_node, of_child) { ret = of_property_read_u32(of_child, "qcom,ddr-type", &ddr_type_of); if (!ret && (ddr_type == ddr_type_of)) { dev_dbg(dev, "ddr-type = %d, is matching DT entry\n", ddr_type_of); ret = add_opp_prop_from_child(dev, of_child); if (ret) return ret; return dev_pm_opp_of_add_table(dev); } ret = -ENODEV; } return ret; } #define PROP_PORTS "qcom,src-dst-ports" #define PROP_ACTIVE "qcom,active-only" Loading Loading @@ -154,8 +212,11 @@ int devfreq_add_devbw(struct device *dev) p->polling_ms = 50; p->target = devbw_target; p->get_dev_status = devbw_get_dev_status; if (of_get_child_count(dev->of_node)) ret = parse_child_nodes_for_opp(dev); else ret = dev_pm_opp_of_add_table(dev); if (ret) dev_err(dev, "Couldn't parse OPP table:%d\n", ret); Loading drivers/devfreq/governor_memlat.c +18 −5 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/mutex.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/of.h> #include <linux/devfreq.h> #include "governor.h" Loading Loading @@ -427,6 +428,7 @@ static struct devfreq_governor devfreq_gov_compute = { #define NUM_COLS 2 static struct core_dev_map *init_core_dev_map(struct device *dev, struct device_node *of_node, char *prop_name) { int len, nf, i, j; Loading @@ -434,7 +436,10 @@ static struct core_dev_map *init_core_dev_map(struct device *dev, struct core_dev_map *tbl; int ret; if (!of_find_property(dev->of_node, prop_name, &len)) if (!of_node) of_node = dev->of_node; if (!of_find_property(of_node, prop_name, &len)) return NULL; len /= sizeof(data); Loading @@ -448,13 +453,13 @@ static struct core_dev_map *init_core_dev_map(struct device *dev, return NULL; for (i = 0, j = 0; i < nf; i++, j += 2) { ret = of_property_read_u32_index(dev->of_node, prop_name, j, ret = of_property_read_u32_index(of_node, prop_name, j, &data); if (ret) return NULL; tbl[i].core_mhz = data / 1000; ret = of_property_read_u32_index(dev->of_node, prop_name, j + 1, ret = of_property_read_u32_index(of_node, prop_name, j + 1, &data); if (ret) return NULL; Loading @@ -471,6 +476,7 @@ static struct memlat_node *register_common(struct device *dev, struct memlat_hwmon *hw) { struct memlat_node *node; struct device_node *of_child; if (!hw->dev && !hw->of_node) return ERR_PTR(-EINVAL); Loading @@ -482,7 +488,14 @@ static struct memlat_node *register_common(struct device *dev, node->ratio_ceil = 10; node->hw = hw; hw->freq_map = init_core_dev_map(dev, "qcom,core-dev-table"); if (hw->get_child_of_node) { of_child = hw->get_child_of_node(dev); hw->freq_map = init_core_dev_map(dev, of_child, "qcom,core-dev-table"); } else { hw->freq_map = init_core_dev_map(dev, NULL, "qcom,core-dev-table"); } if (!hw->freq_map) { dev_err(dev, "Couldn't find the core-dev freq table!\n"); return ERR_PTR(-EINVAL); Loading drivers/devfreq/governor_memlat.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2017, 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -62,6 +62,7 @@ struct memlat_hwmon { int (*start_hwmon)(struct memlat_hwmon *hw); void (*stop_hwmon)(struct memlat_hwmon *hw); unsigned long (*get_cnt)(struct memlat_hwmon *hw); struct device_node *(*get_child_of_node)(struct device *dev); struct device *dev; struct device_node *of_node; Loading Loading
arch/arm64/boot/dts/qcom/trinket.dtsi +131 −28 Original line number Diff line number Diff line Loading @@ -26,6 +26,8 @@ #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) #define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;} #define DDR_TYPE_LPDDR3 5 #define DDR_TYPE_LPDDR4X 7 / { model = "Qualcomm Technologies, Inc. TRINKET"; Loading Loading @@ -2475,7 +2477,7 @@ status = "ok"; }; ddr_bw_opp_table: ddr-bw-opp-table { ddr4_bw_opp_table: ddr4-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ Loading @@ -2489,7 +2491,7 @@ BW_OPP_ENTRY(1804, 8); /*13763 MB/s */ }; suspendable_ddr_bw_opp_table: suspendable-ddr-bw-opp-table { suspendable_ddr4_bw_opp_table: suspendable-ddr4-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 0, 8); /* 0 MB/s */ BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ Loading @@ -2504,13 +2506,43 @@ BW_OPP_ENTRY(1804, 8); /*13763 MB/s */ }; ddr3_bw_opp_table: ddr3-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ BW_OPP_ENTRY( 451, 8); /* 3440 MB/s */ BW_OPP_ENTRY( 547, 8); /* 4173 MB/s */ BW_OPP_ENTRY( 681, 8); /* 5195 MB/s */ BW_OPP_ENTRY( 768, 8); /* 5859 MB/s */ BW_OPP_ENTRY( 931, 8); /* 7102 MB/s */ }; suspendable_ddr3_bw_opp_table: suspendable-ddr3-bw-opp-table { compatible = "operating-points-v2"; BW_OPP_ENTRY( 0, 8); /* 0 MB/s */ BW_OPP_ENTRY( 200, 8); /* 1525 MB/s */ BW_OPP_ENTRY( 300, 8); /* 2288 MB/s */ BW_OPP_ENTRY( 451, 8); /* 3440 MB/s */ BW_OPP_ENTRY( 547, 8); /* 4173 MB/s */ BW_OPP_ENTRY( 681, 8); /* 5195 MB/s */ BW_OPP_ENTRY( 768, 8); /* 5859 MB/s */ BW_OPP_ENTRY( 931, 8); /* 7102 MB/s */ }; cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw { compatible = "qcom,devbw"; governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu_cpu_ddr_bwmon: qcom,cpu-cpu-ddr-bwmon@01b8e200 { Loading @@ -2530,7 +2562,14 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu0_cpu_ddr_latmon: qcom,cpu0-cpu-ddr-latmon { Loading @@ -2539,12 +2578,22 @@ qcom,target-dev = <&cpu0_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0xE7>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 864000 MHZ_TO_MBPS(200, 8) >, < 1305600 MHZ_TO_MBPS(451, 8) >, < 1804800 MHZ_TO_MBPS(768, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 864000 MHZ_TO_MBPS( 300, 8) >, < 1305600 MHZ_TO_MBPS( 547, 8) >, < 1420000 MHZ_TO_MBPS( 768, 8) >, < 1804800 MHZ_TO_MBPS(1017, 8) >; }; }; cpu4_cpu_ddr_lat: qcom,cpu4-cpu-ddr-lat { compatible = "qcom,devbw"; Loading @@ -2552,7 +2601,14 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu4_cpu_ddr_latmon: qcom,cpu4-cpu-ddr-latmon { Loading @@ -2561,12 +2617,23 @@ qcom,target-dev = <&cpu4_cpu_ddr_lat>; qcom,cachemiss-ev = <0x17>; qcom,stall-cycle-ev = <0x24>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 1056000 MHZ_TO_MBPS(200, 8) >, < 1401600 MHZ_TO_MBPS(451, 8) >, < 1804800 MHZ_TO_MBPS(768, 8) >, < 2016000 MHZ_TO_MBPS(931, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 902400 MHZ_TO_MBPS( 451, 8) >, < 1401600 MHZ_TO_MBPS(1017, 8) >, < 1804800 MHZ_TO_MBPS(1555, 8) >, < 2016000 MHZ_TO_MBPS(1804, 8) >; }; }; cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor { compatible = "qcom,devbw"; Loading @@ -2574,19 +2641,36 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu0_computemon: qcom,cpu0-computemon { compatible = "qcom,arm-cpu-mon"; qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; qcom,target-dev = <&cpu0_cpu_ddr_latfloor>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 614400 MHZ_TO_MBPS( 200, 8) >, < 1305600 MHZ_TO_MBPS( 451, 8) >, < 1804800 MHZ_TO_MBPS( 768, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 614400 MHZ_TO_MBPS( 300, 8) >, < 1017600 MHZ_TO_MBPS( 451, 8) >, < 1420000 MHZ_TO_MBPS( 547, 8) >, < 1804800 MHZ_TO_MBPS( 768, 8) >; }; }; cpu4_cpu_ddr_latfloor: qcom,cpu4-cpu-ddr-latfloor { compatible = "qcom,devbw"; Loading @@ -2594,13 +2678,31 @@ qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; ddr3-opp { operating-points-v2 = <&ddr3_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR3>; }; ddr4-opp { operating-points-v2 = <&ddr4_bw_opp_table>; qcom,ddr-type = <DDR_TYPE_LPDDR4X>; }; }; cpu4_computemon: qcom,cpu4-computemon { compatible = "qcom,arm-cpu-mon"; qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; qcom,target-dev = <&cpu4_cpu_ddr_latfloor>; ddr3-map { qcom,ddr-type = <DDR_TYPE_LPDDR3>; qcom,core-dev-table = < 652800 MHZ_TO_MBPS( 200, 8) >, < 1056000 MHZ_TO_MBPS( 451, 8) >, < 1401600 MHZ_TO_MBPS( 547, 8) >, < 1536000 MHZ_TO_MBPS( 768, 8) >, < 2016000 MHZ_TO_MBPS( 931, 8) >; }; ddr4-map { qcom,ddr-type = <DDR_TYPE_LPDDR4X>; qcom,core-dev-table = < 902400 MHZ_TO_MBPS( 300, 8) >, < 1056000 MHZ_TO_MBPS( 547, 8) >, Loading @@ -2608,6 +2710,7 @@ < 1804800 MHZ_TO_MBPS(1017, 8) >, < 2016000 MHZ_TO_MBPS(1804, 8) >; }; }; demux { compatible = "qcom,demux"; Loading
drivers/devfreq/arm-memlat-mon.c +24 −1 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -28,6 +28,7 @@ #include <linux/irq.h> #include <linux/cpu_pm.h> #include <linux/cpu.h> #include <linux/of_fdt.h> #include "governor.h" #include "governor_memlat.h" #include <linux/perf_event.h> Loading Loading @@ -260,6 +261,26 @@ static int get_mask_from_dev_handle(struct platform_device *pdev, return ret; } static struct device_node *parse_child_nodes(struct device *dev) { struct device_node *of_child; int ddr_type_of = -1; int ddr_type = of_fdt_get_ddrtype(); int ret; for_each_child_of_node(dev->of_node, of_child) { ret = of_property_read_u32(of_child, "qcom,ddr-type", &ddr_type_of); if (!ret && (ddr_type == ddr_type_of)) { dev_dbg(dev, "ddr-type = %d, is matching DT entry\n", ddr_type_of); return of_child; } } return NULL; } static int arm_memlat_mon_driver_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; Loading Loading @@ -305,6 +326,8 @@ static int arm_memlat_mon_driver_probe(struct platform_device *pdev) hw->start_hwmon = &start_hwmon; hw->stop_hwmon = &stop_hwmon; hw->get_cnt = &get_cnt; if (of_get_child_count(dev->of_node)) hw->get_child_of_node = &parse_child_nodes; spec = of_device_get_match_data(dev); if (spec && spec->is_compute) { Loading
drivers/devfreq/devfreq_devbw.c +63 −2 Original line number Diff line number Diff line /* * Copyright (c) 2013-2014, 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2014, 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -25,7 +25,9 @@ #include <linux/mutex.h> #include <linux/interrupt.h> #include <linux/devfreq.h> #include <linux/slab.h> #include <linux/of.h> #include <linux/of_fdt.h> #include <trace/events/power.h> #include <linux/msm-bus.h> #include <linux/msm-bus-board.h> Loading Loading @@ -99,6 +101,62 @@ static int devbw_get_dev_status(struct device *dev, return 0; } #define PROP_OPERATING_POINTS_V2 "operating-points-v2" static int add_opp_prop_from_child(struct device *dev, struct device_node *of_child) { struct property *prop; int len = 0, ret = 0; void *value; const void *p_val; p_val = of_get_property(of_child, PROP_OPERATING_POINTS_V2, &len); value = devm_kzalloc(dev, len, GFP_KERNEL); if (!value) return -ENOMEM; memcpy(value, p_val, len); prop = devm_kzalloc(dev, sizeof(*prop), GFP_KERNEL); if (!prop) { devm_kfree(dev, value); return -ENOMEM; } prop->name = "operating-points-v2"; prop->value = value; prop->length = len; ret = of_add_property(dev->of_node, prop); if (ret) { devm_kfree(dev, value); devm_kfree(dev, prop); dev_err(dev, "failed to add property: %d\n", ret); } return ret; } static int parse_child_nodes_for_opp(struct device *dev) { struct device_node *of_child; int ddr_type_of = -1; int ddr_type = of_fdt_get_ddrtype(); int ret = -EINVAL; for_each_child_of_node(dev->of_node, of_child) { ret = of_property_read_u32(of_child, "qcom,ddr-type", &ddr_type_of); if (!ret && (ddr_type == ddr_type_of)) { dev_dbg(dev, "ddr-type = %d, is matching DT entry\n", ddr_type_of); ret = add_opp_prop_from_child(dev, of_child); if (ret) return ret; return dev_pm_opp_of_add_table(dev); } ret = -ENODEV; } return ret; } #define PROP_PORTS "qcom,src-dst-ports" #define PROP_ACTIVE "qcom,active-only" Loading Loading @@ -154,8 +212,11 @@ int devfreq_add_devbw(struct device *dev) p->polling_ms = 50; p->target = devbw_target; p->get_dev_status = devbw_get_dev_status; if (of_get_child_count(dev->of_node)) ret = parse_child_nodes_for_opp(dev); else ret = dev_pm_opp_of_add_table(dev); if (ret) dev_err(dev, "Couldn't parse OPP table:%d\n", ret); Loading
drivers/devfreq/governor_memlat.c +18 −5 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/mutex.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/device.h> #include <linux/of.h> #include <linux/devfreq.h> #include "governor.h" Loading Loading @@ -427,6 +428,7 @@ static struct devfreq_governor devfreq_gov_compute = { #define NUM_COLS 2 static struct core_dev_map *init_core_dev_map(struct device *dev, struct device_node *of_node, char *prop_name) { int len, nf, i, j; Loading @@ -434,7 +436,10 @@ static struct core_dev_map *init_core_dev_map(struct device *dev, struct core_dev_map *tbl; int ret; if (!of_find_property(dev->of_node, prop_name, &len)) if (!of_node) of_node = dev->of_node; if (!of_find_property(of_node, prop_name, &len)) return NULL; len /= sizeof(data); Loading @@ -448,13 +453,13 @@ static struct core_dev_map *init_core_dev_map(struct device *dev, return NULL; for (i = 0, j = 0; i < nf; i++, j += 2) { ret = of_property_read_u32_index(dev->of_node, prop_name, j, ret = of_property_read_u32_index(of_node, prop_name, j, &data); if (ret) return NULL; tbl[i].core_mhz = data / 1000; ret = of_property_read_u32_index(dev->of_node, prop_name, j + 1, ret = of_property_read_u32_index(of_node, prop_name, j + 1, &data); if (ret) return NULL; Loading @@ -471,6 +476,7 @@ static struct memlat_node *register_common(struct device *dev, struct memlat_hwmon *hw) { struct memlat_node *node; struct device_node *of_child; if (!hw->dev && !hw->of_node) return ERR_PTR(-EINVAL); Loading @@ -482,7 +488,14 @@ static struct memlat_node *register_common(struct device *dev, node->ratio_ceil = 10; node->hw = hw; hw->freq_map = init_core_dev_map(dev, "qcom,core-dev-table"); if (hw->get_child_of_node) { of_child = hw->get_child_of_node(dev); hw->freq_map = init_core_dev_map(dev, of_child, "qcom,core-dev-table"); } else { hw->freq_map = init_core_dev_map(dev, NULL, "qcom,core-dev-table"); } if (!hw->freq_map) { dev_err(dev, "Couldn't find the core-dev freq table!\n"); return ERR_PTR(-EINVAL); Loading
drivers/devfreq/governor_memlat.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2017, 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -62,6 +62,7 @@ struct memlat_hwmon { int (*start_hwmon)(struct memlat_hwmon *hw); void (*stop_hwmon)(struct memlat_hwmon *hw); unsigned long (*get_cnt)(struct memlat_hwmon *hw); struct device_node *(*get_child_of_node)(struct device *dev); struct device *dev; struct device_node *of_node; Loading