Loading drivers/gpu/msm/a6xx_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -931,6 +931,7 @@ #define A6XX_GMU_SYS_BUS_CONFIG 0x1F40F #define A6XX_GMU_CM3_SYSRESET 0x1F800 #define A6XX_GMU_CM3_BOOT_CONFIG 0x1F801 #define A6XX_GMU_CX_GMU_WFI_CONFIG 0x1F802 #define A6XX_GMU_CM3_FW_BUSY 0x1F81A #define A6XX_GMU_CM3_FW_INIT_RESULT 0x1F81C #define A6XX_GMU_CM3_CFG 0x1F82D Loading drivers/gpu/msm/adreno_a6xx.c +2 −1 Original line number Diff line number Diff line Loading @@ -638,7 +638,7 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) if (adreno_is_a615(adreno_dev)) return 0x00000222; else return 0x00020222; return 0x00020202; } static inline unsigned int Loading Loading @@ -1516,6 +1516,7 @@ static int a6xx_gmu_start(struct kgsl_device *device) { struct gmu_device *gmu = &device->gmu; kgsl_regwrite(device, A6XX_GMU_CX_GMU_WFI_CONFIG, 0x0); /* Write 1 first to make sure the GMU is reset */ kgsl_gmu_regwrite(device, A6XX_GMU_CM3_SYSRESET, 1); Loading Loading
drivers/gpu/msm/a6xx_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -931,6 +931,7 @@ #define A6XX_GMU_SYS_BUS_CONFIG 0x1F40F #define A6XX_GMU_CM3_SYSRESET 0x1F800 #define A6XX_GMU_CM3_BOOT_CONFIG 0x1F801 #define A6XX_GMU_CX_GMU_WFI_CONFIG 0x1F802 #define A6XX_GMU_CM3_FW_BUSY 0x1F81A #define A6XX_GMU_CM3_FW_INIT_RESULT 0x1F81C #define A6XX_GMU_CM3_CFG 0x1F82D Loading
drivers/gpu/msm/adreno_a6xx.c +2 −1 Original line number Diff line number Diff line Loading @@ -638,7 +638,7 @@ __get_gmu_ao_cgc_mode_cntl(struct adreno_device *adreno_dev) if (adreno_is_a615(adreno_dev)) return 0x00000222; else return 0x00020222; return 0x00020202; } static inline unsigned int Loading Loading @@ -1516,6 +1516,7 @@ static int a6xx_gmu_start(struct kgsl_device *device) { struct gmu_device *gmu = &device->gmu; kgsl_regwrite(device, A6XX_GMU_CX_GMU_WFI_CONFIG, 0x0); /* Write 1 first to make sure the GMU is reset */ kgsl_gmu_regwrite(device, A6XX_GMU_CM3_SYSRESET, 1); Loading