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Commit 8a5c2ae7 authored by Jesse Barnes's avatar Jesse Barnes Committed by Daniel Vetter
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drm/i915: fix ILK GPU reset for render 



Earlier code would leave both bits set, so any reset after the first
would only reset media.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d42264b1

drivers/gpu/drm/i915/i915_drv.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -744,6 +744,7 @@ static int ironlake_do_reset(struct drm_device *dev) 
	int ret;

	int ret;





	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);

	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);

	gdrst &= ~GRDOM_MASK;

	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

		   gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);

		   gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);

	ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);

	ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
@@ -752,6 +753,7 @@ static int ironlake_do_reset(struct drm_device *dev) 




	/* We can't reset render&media without also resetting display ... */

	/* We can't reset render&media without also resetting display ... */

	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);

	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);

	gdrst &= ~GRDOM_MASK;

	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,

		   gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);

		   gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);

	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);

	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -91,6 +91,7 @@ 
#define  GRDOM_FULL	(0<<2)

#define  GRDOM_FULL	(0<<2)

#define  GRDOM_RENDER	(1<<2)

#define  GRDOM_RENDER	(1<<2)

#define  GRDOM_MEDIA	(3<<2)

#define  GRDOM_MEDIA	(3<<2)

#define  GRDOM_MASK	(3<<2)

#define  GRDOM_RESET_ENABLE (1<<0)

#define  GRDOM_RESET_ENABLE (1<<0)





#define GEN6_MBCUNIT_SNPCR	0x900c /* for LLC config */

#define GEN6_MBCUNIT_SNPCR	0x900c /* for LLC config */