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Commit 886f9c69 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Ralf Baechle
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MIPS: ralink: Remove unused rt*_wdt_reset functions 



All pointers to these functions were removed, so now they produce
warnings:

arch/mips/ralink/rt305x.c:92:13: error: 'rt305x_wdt_reset' defined but not used [-Werror=unused-function]

This removes the functions. If we need them again, the patch can be
reverted later.

Fixes: f576fb6a ("MIPS: ralink: cleanup the soc specific pinmux data")
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Cc: John Crispin <john@phrozen.org>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15044/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 6d2700a9

arch/mips/ralink/rt288x.c

+0 −10
Original line number Diff line number Diff line
@@ -40,16 +40,6 @@ static struct rt2880_pmx_group rt2880_pinmux_data_act[] = { 
	{ 0 }

};



static void rt288x_wdt_reset(void)

{

	u32 t;



	/* enable WDT reset output on pin SRAM_CS_N */

	t = rt_sysc_r32(SYSC_REG_CLKCFG);

	t |= CLKCFG_SRAM_CS_N_WDT;

	rt_sysc_w32(t, SYSC_REG_CLKCFG);

}



void __init ralink_clk_init(void)

{

	unsigned long cpu_rate, wmac_rate = 40000000;

arch/mips/ralink/rt305x.c

+0 −11
Original line number Diff line number Diff line
@@ -89,17 +89,6 @@ static struct rt2880_pmx_group rt5350_pinmux_data[] = { 
	{ 0 }

};



static void rt305x_wdt_reset(void)

{

	u32 t;



	/* enable WDT reset output on pin SRAM_CS_N */

	t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG);

	t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT <<

		RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT;

	rt_sysc_w32(t, SYSC_REG_SYSTEM_CONFIG);

}



static unsigned long rt5350_get_mem_size(void)

{

	void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);

arch/mips/ralink/rt3883.c

+0 −10
Original line number Diff line number Diff line
@@ -63,16 +63,6 @@ static struct rt2880_pmx_group rt3883_pinmux_data[] = { 
	{ 0 }

};



static void rt3883_wdt_reset(void)

{

	u32 t;



	/* enable WDT reset output on GPIO 2 */

	t = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG1);

	t |= RT3883_SYSCFG1_GPIO2_AS_WDT_OUT;

	rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);

}



void __init ralink_clk_init(void)

{

	unsigned long cpu_rate, sys_rate;