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Commit 886ab095 authored by Tingwei Zhang's avatar Tingwei Zhang
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ARM: dts: msm: Add RSC register to HW event for SDM855 



Some hardware events need second level MUX selecting.
Add RSC registers to the list of registers supported
by HW event setreg interface.

Change-Id: If855be601fde52d3d1132ef3f8f58a834b1b1961
Signed-off-by: default avatarTingwei Zhang <tingwei@codeaurora.org>
parent 0ba27bd6

arch/arm64/boot/dts/qcom/sdm855-coresight.dtsi

+9 −2
Original line number Diff line number Diff line
@@ -453,9 +453,16 @@ 
		reg = <0x091866F0 0x4>,

		     <0x91966F0 0x4>,

		      <0x9186038 0x4>,

		      <0x9196038 0x4>;

		      <0x9196038 0x4>,

		      <0x17E00034 0x4>,

		     <0x18200050 0x80>,

		     <0x02C8D050 0x80>,

		     <0x0AF20050 0x80>;

		reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl",

			    "ddr-ch23-ctrl";

			    "ddr-ch23-ctrl", "apss-testbus-mux-cfg",

			    "apss-rsc-hwevent-mux0-select",

			    "gpu-rsc-hwevent-mux0-select",

			    "sde-rsc-hwevent-mux0-select";



		coresight-name = "coresight-hwevent";

		coresight-csr = <&csr>;