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Commit 885604a5 authored by Anirudh Ghayal's avatar Anirudh Ghayal
Browse files

power: qpnp-fg-gen4: Update rslow_age_scale_fn for PM8150B V2 



rslow_age_scale_fn is not updated in the PM8150B V2 FG OTP.
Update it with the recommended value.

Change-Id: I1373eac98ab5556ef079ccdef0bd3097163257cf
Signed-off-by: default avatarAnirudh Ghayal <aghayal@codeaurora.org>
parent cbaf7cd8

drivers/power/supply/qcom/fg-core.h

+1 −0
Original line number Diff line number Diff line
@@ -271,6 +271,7 @@ enum wa_flags { 
	PM660_TSMC_OSC_WA = BIT(1),

	PM8150B_V1_DMA_WA = BIT(2),

	PM8150B_V1_RSLOW_COMP_WA = BIT(3),

	PM8150B_V2_RSLOW_SCALE_FN_WA = BIT(4),

};



enum slope_limit_status {

drivers/power/supply/qcom/qpnp-fg-gen4.c

+28 −0
Original line number Diff line number Diff line
@@ -146,6 +146,10 @@ 
#define MONOTONIC_SOC_OFFSET		0



/* v2 SRAM address and offset in ascending order */

#define RSLOW_SCALE_FN_DISCHG_V2_WORD	281

#define RSLOW_SCALE_FN_DISCHG_V2_OFFSET	0

#define RSLOW_SCALE_FN_CHG_V2_WORD	285

#define RSLOW_SCALE_FN_CHG_V2_OFFSET	0

#define ACT_BATT_CAP_v2_WORD		287

#define ACT_BATT_CAP_v2_OFFSET		0

#define RSLOW_v2_WORD			371
@@ -1282,6 +1286,7 @@ static int fg_gen4_bp_params_config(struct fg_dev *fg) 
	int rc, i;

	u8 buf, therm_coeffs[BATT_THERM_NUM_COEFFS * 2];

	u8 rslow_coeffs[RSLOW_NUM_COEFFS], val, mask;

	u16 rslow_scalefn;



	if (fg->bp.vbatt_full_mv > 0) {

		rc = fg_set_constant_chg_voltage(fg,
@@ -1354,6 +1359,27 @@ static int fg_gen4_bp_params_config(struct fg_dev *fg) 
		}

	}



	if (fg->wa_flags & PM8150B_V2_RSLOW_SCALE_FN_WA) {

		rslow_scalefn = 0x4000;

		rc = fg_sram_write(fg, RSLOW_SCALE_FN_CHG_V2_WORD,

				RSLOW_SCALE_FN_CHG_V2_OFFSET,

				(u8 *)&rslow_scalefn, 2, FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing RSLOW_SCALE_FN_CHG_WORD rc=%d\n",

				rc);

			return rc;

		}



		rc = fg_sram_write(fg, RSLOW_SCALE_FN_DISCHG_V2_WORD,

				RSLOW_SCALE_FN_DISCHG_V2_OFFSET,

				(u8 *)&rslow_scalefn, 2, FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing RSLOW_SCALE_FN_DISCHG_WORD rc=%d\n",

				rc);

			return rc;

		}

	}



	if (fg->bp.therm_pull_up_kohms > 0) {

		switch (fg->bp.therm_pull_up_kohms) {

		case 30:
@@ -3764,6 +3790,8 @@ static int fg_gen4_parse_dt(struct fg_gen4_chip *chip) 
			fg->sp = pm8150b_v1_sram_params;

			fg->wa_flags |= PM8150B_V1_DMA_WA;

			fg->wa_flags |= PM8150B_V1_RSLOW_COMP_WA;

		} else if (fg->pmic_rev_id->rev4 == PM8150B_V2P0_REV4) {

			fg->wa_flags |= PM8150B_V2_RSLOW_SCALE_FN_WA;

		}

		break;

	default: