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Commit 86cf6788 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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drm/sun4i: Set TCON clock inside sun4i_tconX_mode_set



Currently we are configuring the TCON's dot clock or special clock
directly from the encoder mode_set functions. Since we already
provide mode_set helper functions for the TCON's 2 channels, we
can set the respective clock from those helpers, and reduce the
exposure of the TCON's internals.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent d281c862
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+0 −2
Original line number Diff line number Diff line
@@ -176,8 +176,6 @@ static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder,

	sun4i_tcon0_mode_set(tcon, mode);

	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);

	/* FIXME: This seems to be board specific */
	clk_set_phase(tcon->dclk, 120);
}
+6 −0
Original line number Diff line number Diff line
@@ -130,6 +130,9 @@ void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon,
	u8 clk_delay;
	u32 val = 0;

	/* Configure the dot clock */
	clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);

	/* Adjust clock delay */
	clk_delay = sun4i_tcon_get_clk_delay(mode, 0);
	regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG,
@@ -205,6 +208,9 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon,

	WARN_ON(!tcon->quirks->has_channel_1);

	/* Configure the dot clock */
	clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);

	/* Adjust clock delay */
	clk_delay = sun4i_tcon_get_clk_delay(mode, 1);
	regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG,
+0 −2
Original line number Diff line number Diff line
@@ -486,8 +486,6 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder,
		      SUN4I_TVE_RESYNC_FIELD : 0));

	regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);

	clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);
}

static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {