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Commit 857ff3fd authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-4.10-reset' of... 

Merge tag 'tegra-for-4.10-reset' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

reset: Add Tegra BPMP reset driver

This contains a patch which implements a reset driver using the services
provided by the BPMP firmware (via the MRQ_RESET request).

* tag 'tegra-for-4.10-reset' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  reset: Add Tegra BPMP reset driver

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e40719dd dc606c52

drivers/reset/Kconfig

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@@ -94,5 +94,6 @@ config RESET_ZYNQ 


source "drivers/reset/sti/Kconfig"

source "drivers/reset/hisilicon/Kconfig"

source "drivers/reset/tegra/Kconfig"



endif

drivers/reset/Makefile

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obj-y += core.o

obj-y += hisilicon/

obj-$(CONFIG_ARCH_STI) += sti/

obj-$(CONFIG_ARCH_TEGRA) += tegra/

obj-$(CONFIG_RESET_ATH79) += reset-ath79.o

obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o

obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o

drivers/reset/tegra/Kconfig

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config RESET_TEGRA_BPMP

	def_bool TEGRA_BPMP

drivers/reset/tegra/Makefile

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obj-$(CONFIG_RESET_TEGRA_BPMP) += reset-bpmp.o

drivers/reset/tegra/reset-bpmp.c

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/*

 * Copyright (C) 2016 NVIDIA Corporation

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/reset-controller.h>



#include <soc/tegra/bpmp.h>

#include <soc/tegra/bpmp-abi.h>



static struct tegra_bpmp *to_tegra_bpmp(struct reset_controller_dev *rstc)

{

	return container_of(rstc, struct tegra_bpmp, rstc);

}



static int tegra_bpmp_reset_common(struct reset_controller_dev *rstc,

				   enum mrq_reset_commands command,

				   unsigned int id)

{

	struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc);

	struct mrq_reset_request request;

	struct tegra_bpmp_message msg;



	memset(&request, 0, sizeof(request));

	request.cmd = command;

	request.reset_id = id;



	memset(&msg, 0, sizeof(msg));

	msg.mrq = MRQ_RESET;

	msg.tx.data = &request;

	msg.tx.size = sizeof(request);



	return tegra_bpmp_transfer(bpmp, &msg);

}



static int tegra_bpmp_reset_module(struct reset_controller_dev *rstc,

				   unsigned long id)

{

	return tegra_bpmp_reset_common(rstc, CMD_RESET_MODULE, id);

}



static int tegra_bpmp_reset_assert(struct reset_controller_dev *rstc,

				   unsigned long id)

{

	return tegra_bpmp_reset_common(rstc, CMD_RESET_ASSERT, id);

}



static int tegra_bpmp_reset_deassert(struct reset_controller_dev *rstc,

				     unsigned long id)

{

	return tegra_bpmp_reset_common(rstc, CMD_RESET_DEASSERT, id);

}



static const struct reset_control_ops tegra_bpmp_reset_ops = {

	.reset = tegra_bpmp_reset_module,

	.assert = tegra_bpmp_reset_assert,

	.deassert = tegra_bpmp_reset_deassert,

};



int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)

{

	bpmp->rstc.ops = &tegra_bpmp_reset_ops;

	bpmp->rstc.owner = THIS_MODULE;

	bpmp->rstc.of_node = bpmp->dev->of_node;

	bpmp->rstc.nr_resets = bpmp->soc->num_resets;



	return devm_reset_controller_register(bpmp->dev, &bpmp->rstc);

}