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Commit 847aec03 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: gcc-sdm855: Add reset clock registers for USB 



Add the missing reset register support for USB.

Change-Id: If762759a20e2a5c0598d97568dea7728b46aee14
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 082edf13

drivers/clk/qcom/gcc-sdm855.c

+4 −0
Original line number Diff line number Diff line
@@ -4385,6 +4385,10 @@ static const struct qcom_reset_map gcc_sdm855_resets[] = { 
	[GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 },

	[GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },

	[GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },

	[GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },

	[GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },

	[GCC_USB3_PHY_SEC_BCR] = { 0x5000c },

	[GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },

	[GCC_SDCC2_BCR] = { 0x14000 },

	[GCC_SDCC4_BCR] = { 0x16000 },

	[GCC_TSIF_BCR] = { 0x36000 },

include/dt-bindings/clock/qcom,gcc-sdm855.h

+12 −8
Original line number Diff line number Diff line
@@ -245,14 +245,18 @@ 
#define GCC_QUPV3_WRAPPER_2_BCR					14

#define GCC_QUSB2PHY_PRIM_BCR					15

#define GCC_QUSB2PHY_SEC_BCR					16

#define GCC_SDCC2_BCR						17

#define GCC_SDCC4_BCR						18

#define GCC_TSIF_BCR						19

#define GCC_UFS_CARD_BCR					20

#define GCC_UFS_PHY_BCR						21

#define GCC_USB30_PRIM_BCR					22

#define GCC_USB30_SEC_BCR					23

#define GCC_USB_PHY_CFG_AHB2PHY_BCR				24

#define GCC_USB3_PHY_PRIM_BCR					17

#define GCC_USB3_DP_PHY_PRIM_BCR				18

#define GCC_USB3_PHY_SEC_BCR					19

#define GCC_USB3PHY_PHY_SEC_BCR					20

#define GCC_SDCC2_BCR						21

#define GCC_SDCC4_BCR						22

#define GCC_TSIF_BCR						23

#define GCC_UFS_CARD_BCR					24

#define GCC_UFS_PHY_BCR						25

#define GCC_USB30_PRIM_BCR					26

#define GCC_USB30_SEC_BCR					27

#define GCC_USB_PHY_CFG_AHB2PHY_BCR				28



/* Dummy clocks for rate measurement */

#define MEASURE_ONLY_SNOC_CLK					0