Loading arch/arm64/boot/dts/qcom/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -21,7 +21,8 @@ dtb-$(CONFIG_ARCH_QCS405) += qcs405-rumi.dtb \ else dtb-$(CONFIG_ARCH_QCS405) += qcs403-iot-sku1.dtb \ qcs403-iot-sku2.dtb \ qcs403-iot-sku3.dtb qcs403-iot-sku3.dtb \ qcs403-iot-sku4.dtb endif ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) Loading arch/arm64/boot/dts/qcom/qcs403-iot-sku4.dts 0 → 100644 +81 −0 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /dts-v1/; #include "qcs403.dtsi" / { model = "Qualcomm Technologies, Inc. QCS403 SSRD IOT AUDIO PLL"; compatible = "qcom,qcs403-iot", "qcom,qcs403", "qcom,iot"; qcom,board-id = <0x010020 0x5>; cpus { /delete-node/ cpu@102; /delete-node/ cpu@103; cpu-map { cluster0 { /delete-node/ core2; /delete-node/ core3; }; }; }; }; &soc { cpuss_dump { /delete-node/ qcom,l1_i_cache102; /delete-node/ qcom,l1_i_cache103; /delete-node/ qcom,l1_d_cache102; /delete-node/ qcom,l1_d_cache103; }; qcom,spm@b012000 { qcom,cpu-vctl-list = <&CPU0 &CPU1>; }; qcom,lpm-levels { qcom,pm-cluster@0{ qcom,pm-cpu { qcom,cpu = <&CPU0 &CPU1>; }; }; }; /delete-node/ cti@61ba000; /delete-node/ cti@61bb000; /delete-node/ etm@61be000; /delete-node/ etm@61bf000; funnel@61a1000 { ports { /delete-node/ port@3; /delete-node/ port@4; }; }; }; &thermal_zones { cpuss-max-step { cooling-maps { /delete-node/ cpu2_cdev; /delete-node/ cpu3_cdev; }; }; /delete-node/ cpuss-2-step; /delete-node/ cpuss-3-step; }; &qnand_1 { status = "ok"; }; arch/arm64/configs/vendor/qcs405-perf_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -409,6 +409,7 @@ CONFIG_MDM_GCC_QCS405=y CONFIG_CLOCK_CPU_QCS405=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y CONFIG_MAILBOX=y CONFIG_QCOM_APCS_IPC=y CONFIG_ARM_SMMU=y Loading arch/arm64/configs/vendor/qcs405_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -424,6 +424,7 @@ CONFIG_MDM_DEBUGCC_QCS405=y CONFIG_CLOCK_CPU_QCS405=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y CONFIG_MAILBOX=y CONFIG_QCOM_APCS_IPC=y CONFIG_ARM_SMMU=y Loading Loading
arch/arm64/boot/dts/qcom/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -21,7 +21,8 @@ dtb-$(CONFIG_ARCH_QCS405) += qcs405-rumi.dtb \ else dtb-$(CONFIG_ARCH_QCS405) += qcs403-iot-sku1.dtb \ qcs403-iot-sku2.dtb \ qcs403-iot-sku3.dtb qcs403-iot-sku3.dtb \ qcs403-iot-sku4.dtb endif ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) Loading
arch/arm64/boot/dts/qcom/qcs403-iot-sku4.dts 0 → 100644 +81 −0 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /dts-v1/; #include "qcs403.dtsi" / { model = "Qualcomm Technologies, Inc. QCS403 SSRD IOT AUDIO PLL"; compatible = "qcom,qcs403-iot", "qcom,qcs403", "qcom,iot"; qcom,board-id = <0x010020 0x5>; cpus { /delete-node/ cpu@102; /delete-node/ cpu@103; cpu-map { cluster0 { /delete-node/ core2; /delete-node/ core3; }; }; }; }; &soc { cpuss_dump { /delete-node/ qcom,l1_i_cache102; /delete-node/ qcom,l1_i_cache103; /delete-node/ qcom,l1_d_cache102; /delete-node/ qcom,l1_d_cache103; }; qcom,spm@b012000 { qcom,cpu-vctl-list = <&CPU0 &CPU1>; }; qcom,lpm-levels { qcom,pm-cluster@0{ qcom,pm-cpu { qcom,cpu = <&CPU0 &CPU1>; }; }; }; /delete-node/ cti@61ba000; /delete-node/ cti@61bb000; /delete-node/ etm@61be000; /delete-node/ etm@61bf000; funnel@61a1000 { ports { /delete-node/ port@3; /delete-node/ port@4; }; }; }; &thermal_zones { cpuss-max-step { cooling-maps { /delete-node/ cpu2_cdev; /delete-node/ cpu3_cdev; }; }; /delete-node/ cpuss-2-step; /delete-node/ cpuss-3-step; }; &qnand_1 { status = "ok"; };
arch/arm64/configs/vendor/qcs405-perf_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -409,6 +409,7 @@ CONFIG_MDM_GCC_QCS405=y CONFIG_CLOCK_CPU_QCS405=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y CONFIG_MAILBOX=y CONFIG_QCOM_APCS_IPC=y CONFIG_ARM_SMMU=y Loading
arch/arm64/configs/vendor/qcs405_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -424,6 +424,7 @@ CONFIG_MDM_DEBUGCC_QCS405=y CONFIG_CLOCK_CPU_QCS405=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_ARCH_TIMER_VCT_ACCESS=y CONFIG_MAILBOX=y CONFIG_QCOM_APCS_IPC=y CONFIG_ARM_SMMU=y Loading