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Commit 83ee62aa authored by Srinivas Rao L's avatar Srinivas Rao L Committed by Raghavendra Kakarla
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ARM: dts: msm: Add PDC interrupt controller for atoll 



Add pdc interrupt controller as SOC interrupt parent and
as a child domain under intc.

Change-Id: I6778e0a349d00d52fdd147fbba6df746eb4913ad
Signed-off-by: default avatarSrinivas Rao L <lsrao@codeaurora.org>
parent aaa3cbba

arch/arm64/boot/dts/qcom/atoll.dtsi

+9 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ 
	compatible = "qcom,atoll";

	qcom,msm-name = "ATOLL";

	qcom,msm-id = <407 0x0>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&pdc>;



	cpus {

		#address-cells = <2>;
@@ -487,6 +487,14 @@ 
		interrupt-parent = <&intc>;

	};



	pdc: interrupt-controller@b220000 {

		compatible = "qcom,pdc-atoll";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-parent = <&intc>;

		interrupt-controller;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 1 0xf08>,