Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 829bc589 authored by Santosh Mardi's avatar Santosh Mardi
Browse files

devfreq: add support for different ddr types 



Target can support different DDR HW versions supporting different
frequencies, add support in DT to update the devfreq nodes
with corresponding frequency mapping based on DDR type supported.

Change-Id: I954ff2b016bc81b50beb933e08f452861b9bea8c
Signed-off-by: default avatarSantosh Mardi <gsantosh@codeaurora.org>
parent 297cd64d

Documentation/devicetree/bindings/devfreq/arm-memlat-mon.txt

+16 −4
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ Optional properties: 
				Defaults to 0x08 if not specified.

- qcom,stall-cycle-ev:		The stall cycle count that this monitor is supposed to measure.

				Assumes 100% stall if not specified.

- qcom,ddr-type:		Optional property indicates ddr type which can support

				different frequencies for a given target.





Example:
@@ -27,8 +29,18 @@ Example: 
		qcom,cachemiss-ev = <0x2A>;

		qcom,inst-ev = <0x08>;

		qcom,stall-cycle-ev = <0xE7>;

		ddr3-map {

			qcom,ddr-type = <DDR_TYPE_LPDDR3>;

			qcom,core-dev-table =

				<  300000 1525 >,

				<  499200 3143 >,

				< 1881600 5859 >;

		};

		ddr4-map {

			qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

			qcom,core-dev-table =

				<  300000 1525 >,

				<  499200 3143 >,

				< 1881600 5859 >;

		};

	};

Documentation/devicetree/bindings/devfreq/devbw.txt

+10 −0
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ Optional properties: 
			enforced only when the CPU subsystem is active.

- governor:		Initial governor to use for the device.

			Default: "performance"

- qcom,ddr-type:	Optional property indicates ddr type which can support

				different frequencies for a given target.



Example:
@@ -55,4 +57,12 @@ Example: 
		qcom,src-dst-ports = <1 512>, <2 512>;

		qcom,active-only;

		operating-points-v2 = <&bw_opp_table>;

		ddr3-opp {

			operating-points-v2 = <&ddr3_bw_opp_table>;

			qcom,ddr-type = <DDR_TYPE_LPDDR3>;

		};

		ddr4-opp {

			operating-points-v2 = <&ddr4_bw_opp_table>;

			qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

		};

	};