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Commit 827634ad authored by Arnaldo Carvalho de Melo's avatar Arnaldo Carvalho de Melo
Browse files

perf tools: Move sh barrier.h stuff to tools/arch/sh/include/asm/barrier.h 

We will need it for atomic.h, so move it from the ad-hoc tools/perf/
place to a tools/ subset of the kernel arch/ hierarchy.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Ahern <dsahern@gmail.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/n/tip-6xqb97k782wqp1r3v6jqayki@git.kernel.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent c6e39db1

tools/arch/sh/include/asm/barrier.h

0 → 100644
+32 −0
Original line number Diff line number Diff line 
/*

 * Copied from the kernel sources:

 *

 * Copyright (C) 1999, 2000  Niibe Yutaka  &  Kaz Kojima

 * Copyright (C) 2002 Paul Mundt

 */

#ifndef __TOOLS_LINUX_ASM_SH_BARRIER_H

#define __TOOLS_LINUX_ASM_SH_BARRIER_H



/*

 * A brief note on ctrl_barrier(), the control register write barrier.

 *

 * Legacy SH cores typically require a sequence of 8 nops after

 * modification of a control register in order for the changes to take

 * effect. On newer cores (like the sh4a and sh5) this is accomplished

 * with icbi.

 *

 * Also note that on sh4a in the icbi case we can forego a synco for the

 * write barrier, as it's not necessary for control registers.

 *

 * Historically we have only done this type of barrier for the MMUCR, but

 * it's also necessary for the CCR, so we make it generic here instead.

 */

#if defined(__SH4A__) || defined(__SH5__)

#define mb()		__asm__ __volatile__ ("synco": : :"memory")

#define rmb()		mb()

#define wmb()		mb()

#endif



#include <asm-generic/barrier.h>



#endif /* __TOOLS_LINUX_ASM_SH_BARRIER_H */

tools/include/asm/barrier.h

+2 −0
Original line number Diff line number Diff line
@@ -4,4 +4,6 @@ 
#include "../../arch/powerpc/include/asm/barrier.h"

#elif defined(__s390__)

#include "../../arch/s390/include/asm/barrier.h"

#elif defined(__sh__)

#include "../../arch/sh/include/asm/barrier.h"

#endif

tools/perf/MANIFEST

+1 −0
Original line number Diff line number Diff line 
tools/perf

tools/arch/powerpc/include/asm/barrier.h

tools/arch/s390/include/asm/barrier.h

tools/arch/sh/include/asm/barrier.h

tools/arch/x86/include/asm/barrier.h

tools/scripts

tools/build

tools/perf/perf-sys.h

+0 −9
Original line number Diff line number Diff line
@@ -46,15 +46,6 @@ 
#endif



#ifdef __sh__

#if defined(__SH4A__) || defined(__SH5__)

# define mb()		asm volatile("synco" ::: "memory")

# define wmb()		asm volatile("synco" ::: "memory")

# define rmb()		asm volatile("synco" ::: "memory")

#else

# define mb()		asm volatile("" ::: "memory")

# define wmb()		asm volatile("" ::: "memory")

# define rmb()		asm volatile("" ::: "memory")

#endif

#define CPUINFO_PROC	{"cpu type"}

#endif