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Commit 81fbc5ef authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP2+: wd_timer: separate watchdog disable code from the rest of mach-omap2/devices.c 



Split the wd_timer disable code out into its own file,
mach-omap2/wd_timer.c; it belongs in its own file rather than
cluttering up devices.c.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Charulatha Varadarajan <charu@ti.com>
parent 233cbe5b

arch/arm/mach-omap2/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 


# Common support

obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \

	 common.o gpio.o dma.o

	 common.o gpio.o dma.o wd_timer.o



omap-2-3-common				= irq.o sdrc.o prm2xxx_3xxx.o

hwmod-common				= omap_hwmod.o \

arch/arm/mach-omap2/devices.c

+5 −50
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 


#include "mux.h"

#include "control.h"

#include "wd_timer.h"



#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
@@ -955,56 +956,9 @@ static inline void omap_init_vout(void) {} 


/*-------------------------------------------------------------------------*/



/*

 * Inorder to avoid any assumptions from bootloader regarding WDT

 * settings, WDT module is reset during init. This enables the watchdog

 * timer. Hence it is required to disable the watchdog after the WDT reset

 * during init. Otherwise the system would reboot as per the default

 * watchdog timer registers settings.

 */

#define OMAP_WDT_WPS	(0x34)

#define OMAP_WDT_SPR	(0x48)



static int omap2_disable_wdt(struct omap_hwmod *oh, void *unused)

{

	void __iomem *base;

	int ret;



	if (!oh) {

		pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);

		return -EINVAL;

	}



	base = omap_hwmod_get_mpu_rt_va(oh);

	if (!base) {

		pr_err("%s: Could not get the base address for %s\n",

				oh->name, __func__);

		return -EINVAL;

	}



	/* Enable the clocks before accessing the WDT registers */

	ret = omap_hwmod_enable(oh);

	if (ret) {

		pr_err("%s: Could not enable clocks for %s\n",

				oh->name, __func__);

		return ret;

	}



	/* sequence required to disable watchdog */

	__raw_writel(0xAAAA, base + OMAP_WDT_SPR);

	while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)

		cpu_relax();



	__raw_writel(0x5555, base + OMAP_WDT_SPR);

	while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)

		cpu_relax();



	ret = omap_hwmod_idle(oh);

	if (ret)

		pr_err("%s: Could not disable clocks for %s\n",

				oh->name, __func__);



	return ret;

	return omap2_wd_timer_disable(oh);

}



static void __init omap_disable_wdt(void)
@@ -1017,7 +971,8 @@ static void __init omap_disable_wdt(void) 


static int __init omap2_init_devices(void)

{

	/* please keep these calls, and their implementations above,

	/*

	 * please keep these calls, and their implementations above,

	 * in alphabetical order so they're easier to sort through.

	 */

	omap_disable_wdt();

arch/arm/mach-omap2/wd_timer.c

0 → 100644
+68 −0
Original line number Diff line number Diff line 
/*

 * OMAP2+ MPU WD_TIMER-specific code

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */



#include <linux/kernel.h>

#include <linux/io.h>

#include <linux/err.h>



#include <plat/omap_hwmod.h>



/*

 * In order to avoid any assumptions from bootloader regarding WDT

 * settings, WDT module is reset during init. This enables the watchdog

 * timer. Hence it is required to disable the watchdog after the WDT reset

 * during init. Otherwise the system would reboot as per the default

 * watchdog timer registers settings.

 */

#define OMAP_WDT_WPS		0x34

#define OMAP_WDT_SPR		0x48





int omap2_wd_timer_disable(struct omap_hwmod *oh)

{

	void __iomem *base;

	int ret;



	if (!oh) {

		pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);

		return -EINVAL;

	}



	base = omap_hwmod_get_mpu_rt_va(oh);

	if (!base) {

		pr_err("%s: Could not get the base address for %s\n",

				oh->name, __func__);

		return -EINVAL;

	}



	/* Enable the clocks before accessing the WDT registers */

	ret = omap_hwmod_enable(oh);

	if (ret) {

		pr_err("%s: Could not enable clocks for %s\n",

				oh->name, __func__);

		return ret;

	}



	/* sequence required to disable watchdog */

	__raw_writel(0xAAAA, base + OMAP_WDT_SPR);

	while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)

		cpu_relax();



	__raw_writel(0x5555, base + OMAP_WDT_SPR);

	while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)

		cpu_relax();



	ret = omap_hwmod_idle(oh);

	if (ret)

		pr_err("%s: Could not disable clocks for %s\n",

				oh->name, __func__);



	return ret;

}

arch/arm/mach-omap2/wd_timer.h

0 → 100644
+17 −0
Original line number Diff line number Diff line 
/*

 * OMAP2+ MPU WD_TIMER-specific function prototypes

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */



#ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H

#define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H



#include <plat/omap_hwmod.h>



extern int omap2_wd_timer_disable(struct omap_hwmod *oh);



#endif