Loading arch/powerpc/Kconfig +2 −1 Original line number Diff line number Diff line Loading @@ -599,7 +599,8 @@ config TASK_SIZE_BOOL config TASK_SIZE hex "Size of user task space" if TASK_SIZE_BOOL default "0x80000000" default "0x80000000" if PPC_PREP || PPC_8xx default "0xc0000000" config CONSISTENT_START_BOOL bool "Set custom consistent memory pool address" Loading arch/powerpc/boot/dts/mpc8272ads.dts +1 −1 Original line number Diff line number Diff line Loading @@ -121,7 +121,7 @@ #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; reg = <119c0 30 0 2000>; reg = <119c0 30>; ranges; muram@0 { Loading arch/powerpc/boot/dts/mpc8541cds.dts +36 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,42 @@ device_type = "open-pic"; big-endian; }; cpm@919c0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 2000 9000 1000>; }; }; brg@919f0 { compatible = "fsl,mpc8541-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; }; cpmpic: pic@90c00 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; }; }; }; pci1: pci@e0008000 { Loading arch/powerpc/boot/dts/mpc8555cds.dts +36 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,42 @@ device_type = "open-pic"; big-endian; }; cpm@919c0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 2000 9000 1000>; }; }; brg@919f0 { compatible = "fsl,mpc8555-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; }; cpmpic: pic@90c00 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; }; }; }; pci1: pci@e0008000 { Loading arch/powerpc/boot/dts/mpc8560ads.dts +44 −38 Original line number Diff line number Diff line Loading @@ -138,15 +138,31 @@ device_type = "open-pic"; }; cpm@e0000000 { cpm@919c0 { #address-cells = <1>; #size-cells = <1>; device_type = "cpm"; model = "CPM2"; ranges = <0 0 c0000>; reg = <80000 40000>; command-proc = <919c0>; brg-frequency = <9d5b340>; compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 4000 9000 2000>; }; }; brg@919f0 { compatible = "fsl,mpc8560-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; clock-frequency = <d#165000000>; }; cpmpic: pic@90c00 { interrupt-controller; Loading @@ -155,43 +171,38 @@ interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; device_type = "cpm-pic"; compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; }; scc@91a00 { serial@91a00 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <1>; compatible = "fsl,mpc8560-scc-uart", "fsl,cpm2-scc-uart"; reg = <91a00 20 88000 100>; clock-setup = <00ffffff 0>; rx-clock = <1>; tx-clock = <1>; fsl,cpm-brg = <1>; fsl,cpm-command = <00800000>; current-speed = <1c200>; interrupts = <28 8>; interrupt-parent = <&cpmpic>; }; scc@91a20 { serial@91a20 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <2>; compatible = "fsl,mpc8560-scc-uart", "fsl,cpm2-scc-uart"; reg = <91a20 20 88100 100>; clock-setup = <ff00ffff 90000>; rx-clock = <2>; tx-clock = <2>; fsl,cpm-brg = <2>; fsl,cpm-command = <04a00000>; current-speed = <1c200>; interrupts = <29 8>; interrupt-parent = <&cpmpic>; }; fcc@91320 { ethernet@91320 { device_type = "network"; compatible = "fs_enet"; model = "FCC"; device-id = <2>; reg = <91320 20 88500 100 913a0 30>; compatible = "fsl,mpc8560-fcc-enet", "fsl,cpm2-fcc-enet"; reg = <91320 20 88500 100 913b0 1>; /* * mac-address is deprecated and will be removed * in 2.6.25. Only recent versions of Loading @@ -199,20 +210,17 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; clock-setup = <ff00ffff 250000>; rx-clock = <15>; tx-clock = <16>; fsl,cpm-command = <16200300>; interrupts = <21 8>; interrupt-parent = <&cpmpic>; phy-handle = <&phy2>; }; fcc@91340 { ethernet@91340 { device_type = "network"; compatible = "fs_enet"; model = "FCC"; device-id = <3>; reg = <91340 20 88600 100 913d0 30>; compatible = "fsl,mpc8560-fcc-enet", "fsl,cpm2-fcc-enet"; reg = <91340 20 88600 100 913d0 1>; /* * mac-address is deprecated and will be removed * in 2.6.25. Only recent versions of Loading @@ -220,9 +228,7 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; clock-setup = <ffff00ff 3700>; rx-clock = <17>; tx-clock = <18>; fsl,cpm-command = <1a400300>; interrupts = <22 8>; interrupt-parent = <&cpmpic>; phy-handle = <&phy3>; Loading Loading
arch/powerpc/Kconfig +2 −1 Original line number Diff line number Diff line Loading @@ -599,7 +599,8 @@ config TASK_SIZE_BOOL config TASK_SIZE hex "Size of user task space" if TASK_SIZE_BOOL default "0x80000000" default "0x80000000" if PPC_PREP || PPC_8xx default "0xc0000000" config CONSISTENT_START_BOOL bool "Set custom consistent memory pool address" Loading
arch/powerpc/boot/dts/mpc8272ads.dts +1 −1 Original line number Diff line number Diff line Loading @@ -121,7 +121,7 @@ #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; reg = <119c0 30 0 2000>; reg = <119c0 30>; ranges; muram@0 { Loading
arch/powerpc/boot/dts/mpc8541cds.dts +36 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,42 @@ device_type = "open-pic"; big-endian; }; cpm@919c0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 2000 9000 1000>; }; }; brg@919f0 { compatible = "fsl,mpc8541-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; }; cpmpic: pic@90c00 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; }; }; }; pci1: pci@e0008000 { Loading
arch/powerpc/boot/dts/mpc8555cds.dts +36 −0 Original line number Diff line number Diff line Loading @@ -145,6 +145,42 @@ device_type = "open-pic"; big-endian; }; cpm@919c0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 2000 9000 1000>; }; }; brg@919f0 { compatible = "fsl,mpc8555-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; }; cpmpic: pic@90c00 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; }; }; }; pci1: pci@e0008000 { Loading
arch/powerpc/boot/dts/mpc8560ads.dts +44 −38 Original line number Diff line number Diff line Loading @@ -138,15 +138,31 @@ device_type = "open-pic"; }; cpm@e0000000 { cpm@919c0 { #address-cells = <1>; #size-cells = <1>; device_type = "cpm"; model = "CPM2"; ranges = <0 0 c0000>; reg = <80000 40000>; command-proc = <919c0>; brg-frequency = <9d5b340>; compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; reg = <919c0 30>; ranges; muram@80000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 80000 10000>; data@0 { compatible = "fsl,cpm-muram-data"; reg = <0 4000 9000 2000>; }; }; brg@919f0 { compatible = "fsl,mpc8560-brg", "fsl,cpm2-brg", "fsl,cpm-brg"; reg = <919f0 10 915f0 10>; clock-frequency = <d#165000000>; }; cpmpic: pic@90c00 { interrupt-controller; Loading @@ -155,43 +171,38 @@ interrupts = <2e 2>; interrupt-parent = <&mpic>; reg = <90c00 80>; device_type = "cpm-pic"; compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; }; scc@91a00 { serial@91a00 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <1>; compatible = "fsl,mpc8560-scc-uart", "fsl,cpm2-scc-uart"; reg = <91a00 20 88000 100>; clock-setup = <00ffffff 0>; rx-clock = <1>; tx-clock = <1>; fsl,cpm-brg = <1>; fsl,cpm-command = <00800000>; current-speed = <1c200>; interrupts = <28 8>; interrupt-parent = <&cpmpic>; }; scc@91a20 { serial@91a20 { device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; device-id = <2>; compatible = "fsl,mpc8560-scc-uart", "fsl,cpm2-scc-uart"; reg = <91a20 20 88100 100>; clock-setup = <ff00ffff 90000>; rx-clock = <2>; tx-clock = <2>; fsl,cpm-brg = <2>; fsl,cpm-command = <04a00000>; current-speed = <1c200>; interrupts = <29 8>; interrupt-parent = <&cpmpic>; }; fcc@91320 { ethernet@91320 { device_type = "network"; compatible = "fs_enet"; model = "FCC"; device-id = <2>; reg = <91320 20 88500 100 913a0 30>; compatible = "fsl,mpc8560-fcc-enet", "fsl,cpm2-fcc-enet"; reg = <91320 20 88500 100 913b0 1>; /* * mac-address is deprecated and will be removed * in 2.6.25. Only recent versions of Loading @@ -199,20 +210,17 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; clock-setup = <ff00ffff 250000>; rx-clock = <15>; tx-clock = <16>; fsl,cpm-command = <16200300>; interrupts = <21 8>; interrupt-parent = <&cpmpic>; phy-handle = <&phy2>; }; fcc@91340 { ethernet@91340 { device_type = "network"; compatible = "fs_enet"; model = "FCC"; device-id = <3>; reg = <91340 20 88600 100 913d0 30>; compatible = "fsl,mpc8560-fcc-enet", "fsl,cpm2-fcc-enet"; reg = <91340 20 88600 100 913d0 1>; /* * mac-address is deprecated and will be removed * in 2.6.25. Only recent versions of Loading @@ -220,9 +228,7 @@ */ mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ]; clock-setup = <ffff00ff 3700>; rx-clock = <17>; tx-clock = <18>; fsl,cpm-command = <1a400300>; interrupts = <22 8>; interrupt-parent = <&cpmpic>; phy-handle = <&phy3>; Loading