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Commit 80652caa authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: qcom: Add sdhc1/sdhc2 for sm6150 mtp/cdp"

parents 7746051a cf9c134b
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+36 −0
Original line number Diff line number Diff line
@@ -59,3 +59,39 @@

	status = "ok";
};

&sdhc_1 {
	vdd-supply = <&pm6150l_l11>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&pm6150_l12>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 325000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

	status = "ok";
};

&sdhc_2 {
	vdd-supply = <&pm6150l_l9>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&pm6150l_l6>;
	qcom,vdd-io-voltage-level = <1800000 3100000>;
	qcom,vdd-io-current-level = <0 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;

	cd-gpios = <&tlmm 99 1>;

	status = "ok";
};
+36 −0
Original line number Diff line number Diff line
@@ -53,3 +53,39 @@

	status = "ok";
};

&sdhc_1 {
	vdd-supply = <&pm6150l_l11>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&pm6150_l12>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 325000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

	status = "ok";
};

&sdhc_2 {
	vdd-supply = <&pm6150l_l9>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&pm6150l_l6>;
	qcom,vdd-io-voltage-level = <1800000 3100000>;
	qcom,vdd-io-current-level = <0 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;

	cd-gpios = <&tlmm 99 1>;

	status = "ok";
};
+36 −0
Original line number Diff line number Diff line
@@ -55,3 +55,39 @@

	status = "ok";
};

&sdhc_1 {
	vdd-supply = <&pm6150l_l11>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 570000>;

	vdd-io-supply = <&pm6150_l12>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <0 325000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

	status = "ok";
};

&sdhc_2 {
	vdd-supply = <&pm6150l_l9>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <0 800000>;

	vdd-io-supply = <&pm6150l_l6>;
	qcom,vdd-io-voltage-level = <1800000 3100000>;
	qcom,vdd-io-current-level = <0 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;

	cd-gpios = <&tlmm 99 1>;

	status = "ok";
};
+26 −0
Original line number Diff line number Diff line
@@ -580,5 +580,31 @@
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cd_on: cd_on {
			mux {
				pins = "gpio99";
				function = "gpio";
			};

			config {
				pins = "gpio99";
				drive-strength = <2>;
				bias-pull-up;
			};
		};

		sdc2_cd_off: cd_off {
			mux {
				pins = "gpio99";
				function = "gpio";
			};

			config {
				pins = "gpio99";
				drive-strength = <2>;
				bias-disable;
			};
		};
	};
};
+2 −2
Original line number Diff line number Diff line
@@ -1197,11 +1197,11 @@
		qcom,large-address-bus;

		qcom,clk-rates = <400000 20000000 25000000
				50000000 100000000 201500000>;
				50000000 100000000 202000000>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
				      "SDR104";

		qcom,devfreq,freq-table = <50000000 201500000>;
		qcom,devfreq,freq-table = <50000000 202000000>;

		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,
			<&clock_gcc GCC_SDCC2_APPS_CLK>;