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Commit 7fd15329 authored by Govinda Rajulu Chenna's avatar Govinda Rajulu Chenna Committed by Abhijith Desai
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drm/msm/dp: update tu calculation for dp sst mode 



Implement TU calculator based on hw design recommendations.

Change-Id: Ibeedc231f362c8417834873ce2fabe8a9f7ff5b1
CRs-Fixed: 2244931
Signed-off-by: default avatarGovinda Rajulu Chenna <gchenna@codeaurora.org>
Signed-off-by: default avatarAbhijith Desai <desaia@codeaurora.org>
parent c21c1388

drivers/gpu/drm/msm/dp/dp_panel.c

+660 −477

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/msm/dp/dp_panel.h

+28 −0
Original line number Diff line number Diff line
@@ -129,6 +129,32 @@ struct dp_panel { 
		struct dp_display_mode *dp_mode);

};



struct dp_tu_calc_input {

	u64 lclk;        /* 162, 270, 540 and 810 */

	u64 pclk_khz;    /* in KHz */

	u64 hactive;     /* active h-width */

	u64 hporch;      /* bp + fp + pulse */

	int nlanes;      /* no.of.lanes */

	int bpp;         /* bits */

	int pixel_enc;   /* 444, 420, 422 */

	int dsc_en;     /* dsc on/off */

	int async_en;   /* async mode */

};



struct dp_vc_tu_mapping_table {

	u32 vic;

	u8 lanes;

	u8 lrate; /* DP_LINK_RATE -> 162(6), 270(10), 540(20), 810 (30) */

	u8 bpp;

	u32 valid_boundary_link;

	u32 delay_start_link;

	bool boundary_moderation_en;

	u32 valid_lower_boundary_link;

	u32 upper_boundary_count;

	u32 lower_boundary_count;

	u32 tu_size_minus1;

};



/**

 * is_link_rate_valid() - validates the link rate

 * @lane_rate: link rate requested by the sink
@@ -158,4 +184,6 @@ static inline bool is_lane_count_valid(u32 lane_count) 


struct dp_panel *dp_panel_get(struct dp_panel_in *in);

void dp_panel_put(struct dp_panel *dp_panel);

void dp_panel_calc_tu_test(struct dp_tu_calc_input *in,

		struct dp_vc_tu_mapping_table *tu_table);

#endif /* _DP_PANEL_H_ */