Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7e76ead2 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.14.34 into android-4.14



Changes in 4.14.34
	i40iw: Fix sequence number for the first partial FPDU
	i40iw: Correct Q1/XF object count equation
	i40iw: Validate correct IRD/ORD connection parameters
	clk: meson: mpll: use 64-bit maths in params_from_rate
	ARM: dts: ls1021a: add "fsl,ls1021a-esdhc" compatible string to esdhc node
	Bluetooth: Add a new 04ca:3015 QCA_ROME device
	ipv6: Reinject IPv6 packets if IPsec policy matches after SNAT
	thermal: power_allocator: fix one race condition issue for thermal_instances list
	perf probe: Find versioned symbols from map
	perf probe: Add warning message if there is unexpected event name
	perf evsel: Enable ignore_missing_thread for pid option
	net: hns3: free the ring_data structrue when change tqps
	net: hns3: fix for getting auto-negotiation state in hclge_get_autoneg
	l2tp: fix missing print session offset info
	rds; Reset rs->rs_bound_addr in rds_add_bound() failure path
	ACPI / video: Default lcd_only to true on Win8-ready and newer machines
	net/mlx4_en: Change default QoS settings
	VFS: close race between getcwd() and d_move()
	watchdog: dw_wdt: add stop watchdog operation
	clk: divider: fix incorrect usage of container_of
	PM / devfreq: Fix potential NULL pointer dereference in governor_store
	selftests/net: fix bugs in address and port initialization
	RDMA/cma: Mark end of CMA ID messages
	hwmon: (ina2xx) Make calibration register value fixed
	clk: sunxi-ng: a83t: Add M divider to TCON1 clock
	media: videobuf2-core: don't go out of the buffer range
	ASoC: Intel: Skylake: Disable clock gating during firmware and library download
	ASoC: Intel: cht_bsw_rt5645: Analog Mic support
	spi: sh-msiof: Fix timeout failures for TX-only DMA transfers
	scsi: libiscsi: Allow sd_shutdown on bad transport
	scsi: mpt3sas: Proper handling of set/clear of "ATA command pending" flag.
	irqchip/gic-v3: Fix the driver probe() fail due to disabled GICC entry
	ACPI: EC: Fix debugfs_create_*() usage
	mac80211: Fix setting TX power on monitor interfaces
	vfb: fix video mode and line_length being set when loaded
	gpio: label descriptors using the device name
	powernv-cpufreq: Add helper to extract pstate from PMSR
	IB/rdmavt: Allocate CQ memory on the correct node
	blk-mq: avoid to map CPU into stale hw queue
	blk-mq: fix race between updating nr_hw_queues and switching io sched
	backlight: tdo24m: Fix the SPI CS between transfers
	pinctrl: baytrail: Enable glitch filter for GPIOs used as interrupts
	nvme_fcloop: disassocate local port structs
	nvme_fcloop: fix abort race condition
	tpm: return a TPM_RC_COMMAND_CODE response if command is not implemented
	perf report: Fix a no annotate browser displayed issue
	staging: lustre: disable preempt while sampling processor id.
	ASoC: Intel: sst: Fix the return value of 'sst_send_byte_stream_mrfld()'
	power: supply: axp288_charger: Properly stop work on probe-error / remove
	rt2x00: do not pause queue unconditionally on error path
	wl1251: check return from call to wl1251_acx_arp_ip_filter
	net/mlx5: Fix race for multiple RoCE enable
	net: hns3: Fix an error of total drop packet statistics
	net: hns3: Fix a loop index error of tqp statistics query
	net: hns3: Fix an error macro definition of HNS3_TQP_STAT
	net: hns3: fix for changing MTU
	bcache: ret IOERR when read meets metadata error
	bcache: stop writeback thread after detaching
	bcache: segregate flash only volume write streams
	scsi: libsas: fix memory leak in sas_smp_get_phy_events()
	scsi: libsas: fix error when getting phy events
	scsi: libsas: initialize sas_phy status according to response of DISCOVER
	blk-mq: fix kernel oops in blk_mq_tag_idle()
	tty: n_gsm: Allow ADM response in addition to UA for control dlci
	block, bfq: put async queues for root bfq groups too
	EDAC, mv64x60: Fix an error handling path
	uio_hv_generic: check that host supports monitor page
	i40evf: don't rely on netif_running() outside rtnl_lock()
	cxgb4vf: Fix SGE FL buffer initialization logic for 64K pages
	scsi: megaraid_sas: Error handling for invalid ldcount provided by firmware in RAID map
	scsi: megaraid_sas: unload flag should be set after scsi_remove_host is called
	RDMA/cma: Fix rdma_cm path querying for RoCE
	gpio: thunderx: fix error return code in thunderx_gpio_probe()
	x86/gart: Exclude GART aperture from vmcore
	sdhci: Advertise 2.0v supply on SDIO host controller
	ibmvnic: Don't handle RX interrupts when not up.
	Input: goodix - disable IRQs while suspended
	mtd: mtd_oobtest: Handle bitflips during reads
	crypto: aes-generic - build with -Os on gcc-7+
	perf tools: Fix copyfile_offset update of output offset
	tcmu: release blocks for partially setup cmds
	thermal: int3400_thermal: fix error handling in int3400_thermal_probe()
	objtool: Add Clang support
	crypto: arm64/aes-ce-cipher - move assembler code to .S file
	x86/microcode: Propagate return value from updating functions
	x86/CPU: Add a microcode loader callback
	x86/CPU: Check CPU feature bits after microcode upgrade
	x86/microcode: Get rid of struct apply_microcode_ctx
	x86/microcode/intel: Check microcode revision before updating sibling threads
	x86/microcode/intel: Writeback and invalidate caches before updating microcode
	x86/microcode: Do not upload microcode if CPUs are offline
	x86/microcode/intel: Look into the patch cache first
	x86/microcode: Request microcode on the BSP
	x86/microcode: Synchronize late microcode loading
	x86/microcode: Attempt late loading only when new microcode is present
	x86/microcode: Fix CPU synchronization routine
	arp: fix arp_filter on l3slave devices
	ipv6: the entire IPv6 header chain must fit the first fragment
	lan78xx: Crash in lan78xx_writ_reg (Workqueue: events lan78xx_deferred_multicast_write)
	net: fix possible out-of-bound read in skb_network_protocol()
	net/ipv6: Fix route leaking between VRFs
	net/ipv6: Increment OUTxxx counters after netfilter hook
	netlink: make sure nladdr has correct size in netlink_connect()
	net sched actions: fix dumping which requires several messages to user space
	net/sched: fix NULL dereference in the error path of tcf_bpf_init()
	pptp: remove a buggy dst release in pptp_connect()
	r8169: fix setting driver_data after register_netdev
	sctp: do not leak kernel memory to user space
	sctp: sctp_sockaddr_af must check minimal addr length for AF_INET6
	sky2: Increase D3 delay to sky2 stops working after suspend
	vhost: correctly remove wait queue during poll failure
	vlan: also check phy_driver ts_info for vlan's real device
	vrf: Fix use after free and double free in vrf_finish_output
	bonding: fix the err path for dev hwaddr sync in bond_enslave
	bonding: move dev_mc_sync after master_upper_dev_link in bond_enslave
	bonding: process the err returned by dev_set_allmulti properly in bond_enslave
	net: fool proof dev_valid_name()
	ip_tunnel: better validate user provided tunnel names
	ipv6: sit: better validate user provided tunnel names
	ip6_gre: better validate user provided tunnel names
	ip6_tunnel: better validate user provided tunnel names
	vti6: better validate user provided tunnel names
	net/mlx5e: Avoid using the ipv6 stub in the TC offload neigh update path
	net/mlx5e: Fix memory usage issues in offloading TC flows
	nfp: use full 40 bits of the NSP buffer address
	ipv6: sr: fix seg6 encap performances with TSO enabled
	net/mlx5e: Don't override vport admin link state in switchdev mode
	net/mlx5e: Sync netdev vxlan ports at open
	net/sched: fix NULL dereference in the error path of tunnel_key_init()
	net/sched: fix NULL dereference on the error path of tcf_skbmod_init()
	strparser: Fix sign of err codes
	net/mlx4_en: Fix mixed PFC and Global pause user control requests
	net/mlx5e: Fix traffic being dropped on VF representor
	vhost: validate log when IOTLB is enabled
	route: check sysctl_fib_multipath_use_neigh earlier than hash
	team: move dev_mc_sync after master_upper_dev_link in team_port_add
	vhost_net: add missing lock nesting notation
	net/mlx4_core: Fix memory leak while delete slave's resources
	Linux 4.14.34

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents 8e2a0d8b ffebeb0d
Loading
Loading
Loading
Loading
+1 −1
Original line number Original line Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0
# SPDX-License-Identifier: GPL-2.0
VERSION = 4
VERSION = 4
PATCHLEVEL = 14
PATCHLEVEL = 14
SUBLEVEL = 33
SUBLEVEL = 34
EXTRAVERSION =
EXTRAVERSION =
NAME = Petit Gorille
NAME = Petit Gorille


+1 −1
Original line number Original line Diff line number Diff line
@@ -155,7 +155,7 @@
		};
		};


		esdhc: esdhc@1560000 {
		esdhc: esdhc@1560000 {
			compatible = "fsl,esdhc";
			compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
			reg = <0x0 0x1560000 0x0 0x10000>;
			reg = <0x0 0x1560000 0x0 0x10000>;
			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <0>;
			clock-frequency = <0>;
+1 −1
Original line number Original line Diff line number Diff line
@@ -24,7 +24,7 @@ obj-$(CONFIG_CRYPTO_CRC32_ARM64_CE) += crc32-ce.o
crc32-ce-y:= crc32-ce-core.o crc32-ce-glue.o
crc32-ce-y:= crc32-ce-core.o crc32-ce-glue.o


obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o
obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o
CFLAGS_aes-ce-cipher.o += -march=armv8-a+crypto
aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o


obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
+87 −0
Original line number Original line Diff line number Diff line
/*
 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/linkage.h>
#include <asm/assembler.h>

	.arch		armv8-a+crypto

ENTRY(__aes_ce_encrypt)
	sub		w3, w3, #2
	ld1		{v0.16b}, [x2]
	ld1		{v1.4s}, [x0], #16
	cmp		w3, #10
	bmi		0f
	bne		3f
	mov		v3.16b, v1.16b
	b		2f
0:	mov		v2.16b, v1.16b
	ld1		{v3.4s}, [x0], #16
1:	aese		v0.16b, v2.16b
	aesmc		v0.16b, v0.16b
2:	ld1		{v1.4s}, [x0], #16
	aese		v0.16b, v3.16b
	aesmc		v0.16b, v0.16b
3:	ld1		{v2.4s}, [x0], #16
	subs		w3, w3, #3
	aese		v0.16b, v1.16b
	aesmc		v0.16b, v0.16b
	ld1		{v3.4s}, [x0], #16
	bpl		1b
	aese		v0.16b, v2.16b
	eor		v0.16b, v0.16b, v3.16b
	st1		{v0.16b}, [x1]
	ret
ENDPROC(__aes_ce_encrypt)

ENTRY(__aes_ce_decrypt)
	sub		w3, w3, #2
	ld1		{v0.16b}, [x2]
	ld1		{v1.4s}, [x0], #16
	cmp		w3, #10
	bmi		0f
	bne		3f
	mov		v3.16b, v1.16b
	b		2f
0:	mov		v2.16b, v1.16b
	ld1		{v3.4s}, [x0], #16
1:	aesd		v0.16b, v2.16b
	aesimc		v0.16b, v0.16b
2:	ld1		{v1.4s}, [x0], #16
	aesd		v0.16b, v3.16b
	aesimc		v0.16b, v0.16b
3:	ld1		{v2.4s}, [x0], #16
	subs		w3, w3, #3
	aesd		v0.16b, v1.16b
	aesimc		v0.16b, v0.16b
	ld1		{v3.4s}, [x0], #16
	bpl		1b
	aesd		v0.16b, v2.16b
	eor		v0.16b, v0.16b, v3.16b
	st1		{v0.16b}, [x1]
	ret
ENDPROC(__aes_ce_decrypt)

/*
 * __aes_ce_sub() - use the aese instruction to perform the AES sbox
 *                  substitution on each byte in 'input'
 */
ENTRY(__aes_ce_sub)
	dup		v1.4s, w0
	movi		v0.16b, #0
	aese		v0.16b, v1.16b
	umov		w0, v0.s[0]
	ret
ENDPROC(__aes_ce_sub)

ENTRY(__aes_ce_invert)
	ld1		{v0.4s}, [x1]
	aesimc		v1.16b, v0.16b
	st1		{v1.4s}, [x0]
	ret
ENDPROC(__aes_ce_invert)
+12 −103
Original line number Original line Diff line number Diff line
@@ -29,6 +29,13 @@ struct aes_block {
	u8 b[AES_BLOCK_SIZE];
	u8 b[AES_BLOCK_SIZE];
};
};


asmlinkage void __aes_ce_encrypt(u32 *rk, u8 *out, const u8 *in, int rounds);
asmlinkage void __aes_ce_decrypt(u32 *rk, u8 *out, const u8 *in, int rounds);

asmlinkage u32 __aes_ce_sub(u32 l);
asmlinkage void __aes_ce_invert(struct aes_block *out,
				const struct aes_block *in);

static int num_rounds(struct crypto_aes_ctx *ctx)
static int num_rounds(struct crypto_aes_ctx *ctx)
{
{
	/*
	/*
@@ -44,10 +51,6 @@ static int num_rounds(struct crypto_aes_ctx *ctx)
static void aes_cipher_encrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
static void aes_cipher_encrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
{
{
	struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm);
	struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm);
	struct aes_block *out = (struct aes_block *)dst;
	struct aes_block const *in = (struct aes_block *)src;
	void *dummy0;
	int dummy1;


	if (!may_use_simd()) {
	if (!may_use_simd()) {
		__aes_arm64_encrypt(ctx->key_enc, dst, src, num_rounds(ctx));
		__aes_arm64_encrypt(ctx->key_enc, dst, src, num_rounds(ctx));
@@ -55,49 +58,13 @@ static void aes_cipher_encrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
	}
	}


	kernel_neon_begin();
	kernel_neon_begin();

	__aes_ce_encrypt(ctx->key_enc, dst, src, num_rounds(ctx));
	__asm__("	ld1	{v0.16b}, %[in]			;"
		"	ld1	{v1.4s}, [%[key]], #16		;"
		"	cmp	%w[rounds], #10			;"
		"	bmi	0f				;"
		"	bne	3f				;"
		"	mov	v3.16b, v1.16b			;"
		"	b	2f				;"
		"0:	mov	v2.16b, v1.16b			;"
		"	ld1	{v3.4s}, [%[key]], #16		;"
		"1:	aese	v0.16b, v2.16b			;"
		"	aesmc	v0.16b, v0.16b			;"
		"2:	ld1	{v1.4s}, [%[key]], #16		;"
		"	aese	v0.16b, v3.16b			;"
		"	aesmc	v0.16b, v0.16b			;"
		"3:	ld1	{v2.4s}, [%[key]], #16		;"
		"	subs	%w[rounds], %w[rounds], #3	;"
		"	aese	v0.16b, v1.16b			;"
		"	aesmc	v0.16b, v0.16b			;"
		"	ld1	{v3.4s}, [%[key]], #16		;"
		"	bpl	1b				;"
		"	aese	v0.16b, v2.16b			;"
		"	eor	v0.16b, v0.16b, v3.16b		;"
		"	st1	{v0.16b}, %[out]		;"

	:	[out]		"=Q"(*out),
		[key]		"=r"(dummy0),
		[rounds]	"=r"(dummy1)
	:	[in]		"Q"(*in),
				"1"(ctx->key_enc),
				"2"(num_rounds(ctx) - 2)
	:	"cc");

	kernel_neon_end();
	kernel_neon_end();
}
}


static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
{
{
	struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm);
	struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm);
	struct aes_block *out = (struct aes_block *)dst;
	struct aes_block const *in = (struct aes_block *)src;
	void *dummy0;
	int dummy1;


	if (!may_use_simd()) {
	if (!may_use_simd()) {
		__aes_arm64_decrypt(ctx->key_dec, dst, src, num_rounds(ctx));
		__aes_arm64_decrypt(ctx->key_dec, dst, src, num_rounds(ctx));
@@ -105,62 +72,10 @@ static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[])
	}
	}


	kernel_neon_begin();
	kernel_neon_begin();

	__aes_ce_decrypt(ctx->key_dec, dst, src, num_rounds(ctx));
	__asm__("	ld1	{v0.16b}, %[in]			;"
		"	ld1	{v1.4s}, [%[key]], #16		;"
		"	cmp	%w[rounds], #10			;"
		"	bmi	0f				;"
		"	bne	3f				;"
		"	mov	v3.16b, v1.16b			;"
		"	b	2f				;"
		"0:	mov	v2.16b, v1.16b			;"
		"	ld1	{v3.4s}, [%[key]], #16		;"
		"1:	aesd	v0.16b, v2.16b			;"
		"	aesimc	v0.16b, v0.16b			;"
		"2:	ld1	{v1.4s}, [%[key]], #16		;"
		"	aesd	v0.16b, v3.16b			;"
		"	aesimc	v0.16b, v0.16b			;"
		"3:	ld1	{v2.4s}, [%[key]], #16		;"
		"	subs	%w[rounds], %w[rounds], #3	;"
		"	aesd	v0.16b, v1.16b			;"
		"	aesimc	v0.16b, v0.16b			;"
		"	ld1	{v3.4s}, [%[key]], #16		;"
		"	bpl	1b				;"
		"	aesd	v0.16b, v2.16b			;"
		"	eor	v0.16b, v0.16b, v3.16b		;"
		"	st1	{v0.16b}, %[out]		;"

	:	[out]		"=Q"(*out),
		[key]		"=r"(dummy0),
		[rounds]	"=r"(dummy1)
	:	[in]		"Q"(*in),
				"1"(ctx->key_dec),
				"2"(num_rounds(ctx) - 2)
	:	"cc");

	kernel_neon_end();
	kernel_neon_end();
}
}


/*
 * aes_sub() - use the aese instruction to perform the AES sbox substitution
 *             on each byte in 'input'
 */
static u32 aes_sub(u32 input)
{
	u32 ret;

	__asm__("dup	v1.4s, %w[in]		;"
		"movi	v0.16b, #0		;"
		"aese	v0.16b, v1.16b		;"
		"umov	%w[out], v0.4s[0]	;"

	:	[out]	"=r"(ret)
	:	[in]	"r"(input)
	:		"v0","v1");

	return ret;
}

int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,
int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,
		     unsigned int key_len)
		     unsigned int key_len)
{
{
@@ -189,7 +104,7 @@ int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,
		u32 *rki = ctx->key_enc + (i * kwords);
		u32 *rki = ctx->key_enc + (i * kwords);
		u32 *rko = rki + kwords;
		u32 *rko = rki + kwords;


		rko[0] = ror32(aes_sub(rki[kwords - 1]), 8) ^ rcon[i] ^ rki[0];
		rko[0] = ror32(__aes_ce_sub(rki[kwords - 1]), 8) ^ rcon[i] ^ rki[0];
		rko[1] = rko[0] ^ rki[1];
		rko[1] = rko[0] ^ rki[1];
		rko[2] = rko[1] ^ rki[2];
		rko[2] = rko[1] ^ rki[2];
		rko[3] = rko[2] ^ rki[3];
		rko[3] = rko[2] ^ rki[3];
@@ -202,7 +117,7 @@ int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,
		} else if (key_len == AES_KEYSIZE_256) {
		} else if (key_len == AES_KEYSIZE_256) {
			if (i >= 6)
			if (i >= 6)
				break;
				break;
			rko[4] = aes_sub(rko[3]) ^ rki[4];
			rko[4] = __aes_ce_sub(rko[3]) ^ rki[4];
			rko[5] = rko[4] ^ rki[5];
			rko[5] = rko[4] ^ rki[5];
			rko[6] = rko[5] ^ rki[6];
			rko[6] = rko[5] ^ rki[6];
			rko[7] = rko[6] ^ rki[7];
			rko[7] = rko[6] ^ rki[7];
@@ -221,13 +136,7 @@ int ce_aes_expandkey(struct crypto_aes_ctx *ctx, const u8 *in_key,


	key_dec[0] = key_enc[j];
	key_dec[0] = key_enc[j];
	for (i = 1, j--; j > 0; i++, j--)
	for (i = 1, j--; j > 0; i++, j--)
		__asm__("ld1	{v0.4s}, %[in]		;"
		__aes_ce_invert(key_dec + i, key_enc + j);
			"aesimc	v1.16b, v0.16b		;"
			"st1	{v1.4s}, %[out]	;"

		:	[out]	"=Q"(key_dec[i])
		:	[in]	"Q"(key_enc[j])
		:		"v0","v1");
	key_dec[i] = key_enc[0];
	key_dec[i] = key_enc[0];


	kernel_neon_end();
	kernel_neon_end();
Loading