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Commit 7dc0bac4 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/disp/g94-: port OR DP link setup to nvkm_ior 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 33378104

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

+6 −4
Original line number Original line Diff line number Diff line
@@ -240,12 +240,14 @@ nvkm_dp_train_links(struct nvkm_dp *dp) 
		nvbios_exec(&init);

		nvbios_exec(&init);

	}

	}





	ret = dp->func->lnk_ctl(dp, ior->dp.nr, ior->dp.bw, ior->dp.ef);

	ret = ior->func->dp.links(ior, dp->aux);

	if (ret) {

	if (ret) {

		if (ret < 0)

		if (ret < 0) {

			OUTP_ERR(&dp->outp, "lnk_ctl failed with %d", ret);

			OUTP_ERR(&dp->outp, "train failed with %d", ret);

			return ret;

			return ret;

		}

		}

		return 0;

	}





	dp->func->lnk_pwr(dp, ior->dp.nr);

	dp->func->lnk_pwr(dp, ior->dp.nr);

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -35,7 +35,6 @@ struct nvkm_dp { 
struct nvkm_output_dp_func {

struct nvkm_output_dp_func {

	int (*pattern)(struct nvkm_output_dp *, int);

	int (*pattern)(struct nvkm_output_dp *, int);

	int (*lnk_pwr)(struct nvkm_output_dp *, int nr);

	int (*lnk_pwr)(struct nvkm_output_dp *, int nr);

	int (*lnk_ctl)(struct nvkm_output_dp *, int nr, int bw, bool ef);

	int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);

	int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);

	void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,

	void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,

		     u8 num_slots, u16 pbn, u16 aligned_pbn);

		     u8 num_slots, u16 pbn, u16 aligned_pbn);
@@ -55,7 +54,6 @@ int g94_sor_dp_lnk_pwr(struct nvkm_dp *, int); 




int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,

int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,

		     struct nvkm_output **);

		     struct nvkm_output **);

int gf119_sor_dp_lnk_ctl(struct nvkm_dp *, int, int, bool);

int gf119_sor_dp_drv_ctl(struct nvkm_dp *, int, int, int, int);

int gf119_sor_dp_drv_ctl(struct nvkm_dp *, int, int, int, int);

void gf119_sor_dp_vcpi(struct nvkm_dp *, int, u8, u8, u16, u16);

void gf119_sor_dp_vcpi(struct nvkm_dp *, int, u8, u8, u16, u16);

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h

+11 −0
Original line number Original line Diff line number Diff line 
#ifndef __NVKM_DISP_IOR_H__

#ifndef __NVKM_DISP_IOR_H__

#define __NVKM_DISP_IOR_H__

#define __NVKM_DISP_IOR_H__

#include "priv.h"

#include "priv.h"

struct nvkm_i2c_aux;





struct nvkm_ior {

struct nvkm_ior {

	const struct nvkm_ior_func *func;

	const struct nvkm_ior_func *func;
@@ -52,6 +53,7 @@ struct nvkm_ior_func { 




	struct {

	struct {

		u8 lanes[4];

		u8 lanes[4];

		int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *);

	} dp;

	} dp;

};

};
@@ -69,11 +71,20 @@ nv50_ior_base(struct nvkm_ior *ior) 
void nv50_dac_power(struct nvkm_ior *, bool, bool, bool, bool, bool);

void nv50_dac_power(struct nvkm_ior *, bool, bool, bool, bool, bool);

int nv50_dac_sense(struct nvkm_ior *, u32);

int nv50_dac_sense(struct nvkm_ior *, u32);





static inline u32

nv50_sor_link(struct nvkm_ior *ior)

{

	return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80);

}



void nv50_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

void nv50_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);

void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);





void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);



void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);

int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);





void g84_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);

void g84_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);

void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);

void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);

drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c

+6 −4
Original line number Original line Diff line number Diff line
@@ -58,10 +58,10 @@ nv50_pior_output_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) 
}

}





static int

static int

nv50_pior_output_dp_lnk_ctl(struct nvkm_output_dp *outp,

nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)

			    int nr, int bw, bool ef)

{

{

	int ret = nvkm_i2c_aux_lnk_ctl(outp->aux, nr, bw, ef);

	int ret = nvkm_i2c_aux_lnk_ctl(aux, pior->dp.nr, pior->dp.bw,

					    pior->dp.ef);

	if (ret)

	if (ret)

		return ret;

		return ret;

	return 1;

	return 1;
@@ -71,7 +71,6 @@ static const struct nvkm_output_dp_func 
nv50_pior_output_dp_func = {

nv50_pior_output_dp_func = {

	.pattern = nv50_pior_output_dp_pattern,

	.pattern = nv50_pior_output_dp_pattern,

	.lnk_pwr = nv50_pior_output_dp_lnk_pwr,

	.lnk_pwr = nv50_pior_output_dp_lnk_pwr,

	.lnk_ctl = nv50_pior_output_dp_lnk_ctl,

};

};





int

int
@@ -129,6 +128,9 @@ static const struct nvkm_ior_func 
nv50_pior = {

nv50_pior = {

	.state = nv50_pior_state,

	.state = nv50_pior_state,

	.power = nv50_pior_power,

	.power = nv50_pior_power,

	.dp = {

		.links = nv50_pior_dp_links,

	},

};

};





int

int

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c

+9 −9
Original line number Original line Diff line number Diff line
@@ -110,19 +110,19 @@ g94_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) 
	return 0;

	return 0;

}

}





static int

int

g94_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)

g94_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)

{

{

	struct nvkm_device *device = outp->base.disp->engine.subdev.device;

	struct nvkm_device *device = sor->disp->engine.subdev.device;

	const u32 soff = g94_sor_soff(outp);

	const u32 soff = nv50_ior_base(sor);

	const u32 loff = g94_sor_loff(outp);

	const u32 loff = nv50_sor_link(sor);

	u32 dpctrl = 0x00000000;

	u32 dpctrl = 0x00000000;

	u32 clksor = 0x00000000;

	u32 clksor = 0x00000000;





	dpctrl |= ((1 << nr) - 1) << 16;

	dpctrl |= ((1 << sor->dp.nr) - 1) << 16;

	if (ef)

	if (sor->dp.ef)

		dpctrl |= 0x00004000;

		dpctrl |= 0x00004000;

	if (bw > 0x06)

	if (sor->dp.bw > 0x06)

		clksor |= 0x00040000;

		clksor |= 0x00040000;





	nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor);

	nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor);
@@ -134,7 +134,6 @@ static const struct nvkm_output_dp_func 
g94_sor_dp_func = {

g94_sor_dp_func = {

	.pattern = g94_sor_dp_pattern,

	.pattern = g94_sor_dp_pattern,

	.lnk_pwr = g94_sor_dp_lnk_pwr,

	.lnk_pwr = g94_sor_dp_lnk_pwr,

	.lnk_ctl = g94_sor_dp_lnk_ctl,

	.drv_ctl = g94_sor_dp_drv_ctl,

	.drv_ctl = g94_sor_dp_drv_ctl,

};

};
@@ -300,6 +299,7 @@ g94_sor = { 
	.power = nv50_sor_power,

	.power = nv50_sor_power,

	.dp = {

	.dp = {

		.lanes = { 2, 1, 0, 3},

		.lanes = { 2, 1, 0, 3},

		.links = g94_sor_dp_links,

	},

	},

};

};