Merge "arm64: hw_breakpoint: don't clear debug registers in halt mode" (7d7a45b1) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/include/asm/debug-monitors.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -31,6 +31,7 @@

	/* MDSCR_EL1 enabling bits */		/* MDSCR_EL1 enabling bits */
	#define DBG_MDSCR_KDE (1 << 13)		#define DBG_MDSCR_KDE (1 << 13)
			#define DBG_MDSCR_HDE (1 << 14)
	#define DBG_MDSCR_MDE (1 << 15)		#define DBG_MDSCR_MDE (1 << 15)
	#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE \| DBG_MDSCR_MDE)		#define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE \| DBG_MDSCR_MDE)

+19 −0

Original line number	Original line	Diff line number	Diff line
	@@ -934,6 +934,17 @@ void hw_breakpoint_thread_switch(struct task_struct *next)
	!next_debug_info->wps_disabled);		!next_debug_info->wps_disabled);
	}		}

			/*
			* Check if halted debug mode is enabled.
			*/
			static u32 hde_enabled(void)
			{
			u32 mdscr;

			asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
			return (mdscr & DBG_MDSCR_HDE);
			}

	/*		/*
	* CPU initialisation.		* CPU initialisation.
	*/		*/
	@@ -941,6 +952,14 @@ static int hw_breakpoint_reset(unsigned int cpu)
	{		{
	int i;		int i;
	struct perf_event **slots;		struct perf_event **slots;

			/*
			* When halting debug mode is enabled, break point could be already
			* set be external debugger. Don't reset debug registers here to
			* reserve break point from external debugger.
			*/
			if (hde_enabled())
			return 0;
	/*		/*
	* When a CPU goes through cold-boot, it does not have any installed		* When a CPU goes through cold-boot, it does not have any installed
	* slot, so it is safe to share the same function for restoring and		* slot, so it is safe to share the same function for restoring and