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Commit 7bc35b1b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "wil6210: ignore HALP ICR if already handled"

parents 534ca408 7ecb74d2
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+7 −3
Original line number Diff line number Diff line
@@ -575,11 +575,15 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
	}

	if (isr & BIT_DMA_EP_MISC_ICR_HALP) {
		isr &= ~BIT_DMA_EP_MISC_ICR_HALP;
		if (atomic_read(&wil->halp.handle_icr)) {
			/* no need to handle HALP ICRs until next vote */
			atomic_set(&wil->halp.handle_icr, 0);
			wil_dbg_irq(wil, "irq_misc: HALP IRQ invoked\n");
			wil6210_mask_halp(wil);
		isr &= ~BIT_DMA_EP_MISC_ICR_HALP;
			complete(&wil->halp.comp);
		}
	}

	wil->isr_misc = isr;

+11 −2
Original line number Diff line number Diff line
@@ -1423,8 +1423,15 @@ static void wil_pre_fw_config(struct wil6210_priv *wil)
	wil6210_clear_irq(wil);
	/* CAF_ICR - clear and mask */
	/* it is W1C, clear by writing back same value */
	if (wil->hw_version < HW_VER_TALYN_MB) {
		wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
		wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
	} else {
		wil_s(wil,
		      RGF_CAF_ICR_TALYN_MB + offsetof(struct RGF_ICR, ICR), 0);
		wil_w(wil, RGF_CAF_ICR_TALYN_MB +
		      offsetof(struct RGF_ICR, IMV), ~0);
	}
	/* clear PAL_UNIT_ICR (potential D0->D3 leftover)
	 * In Talyn-MB host cannot access this register due to
	 * access control, hence PAL_UNIT_ICR is cleared by the FW
@@ -1851,6 +1858,8 @@ void wil_halp_vote(struct wil6210_priv *wil)

	if (++wil->halp.ref_cnt == 1) {
		reinit_completion(&wil->halp.comp);
		/* mark to IRQ context to handle HALP ICR */
		atomic_set(&wil->halp.handle_icr, 1);
		wil6210_set_halp(wil);
		rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
		if (!rc) {
+12 −11
Original line number Diff line number Diff line
@@ -835,22 +835,23 @@ static int wil_rx_error_check_edma(struct wil6210_priv *wil,
		wil_dbg_txrx(wil, "L2 RX error, l2_rx_status=0x%x\n",
			     l2_rx_status);
		/* Due to HW issue, KEY error will trigger a MIC error */
		if (l2_rx_status & WIL_RX_EDMA_ERROR_MIC) {
			wil_dbg_txrx(wil,
		if (l2_rx_status == WIL_RX_EDMA_ERROR_MIC) {
			wil_err_ratelimited(wil,
					    "L2 MIC/KEY error, dropping packet\n");
			stats->rx_mic_error++;
		}
		if (l2_rx_status & WIL_RX_EDMA_ERROR_KEY) {
			wil_dbg_txrx(wil, "L2 KEY error, dropping packet\n");
		if (l2_rx_status == WIL_RX_EDMA_ERROR_KEY) {
			wil_err_ratelimited(wil,
					    "L2 KEY error, dropping packet\n");
			stats->rx_key_error++;
		}
		if (l2_rx_status & WIL_RX_EDMA_ERROR_REPLAY) {
			wil_dbg_txrx(wil,
		if (l2_rx_status == WIL_RX_EDMA_ERROR_REPLAY) {
			wil_err_ratelimited(wil,
					    "L2 REPLAY error, dropping packet\n");
			stats->rx_replay++;
		}
		if (l2_rx_status & WIL_RX_EDMA_ERROR_AMSDU) {
			wil_dbg_txrx(wil,
		if (l2_rx_status == WIL_RX_EDMA_ERROR_AMSDU) {
			wil_err_ratelimited(wil,
					    "L2 AMSDU error, dropping packet\n");
			stats->rx_amsdu_error++;
		}
+2 −0
Original line number Diff line number Diff line
@@ -324,6 +324,7 @@ struct RGF_ICR {
/* MAC timer, usec, for packet lifetime */
#define RGF_MAC_MTRL_COUNTER_0		(0x886aa8)

#define RGF_CAF_ICR_TALYN_MB		(0x8893d4) /* struct RGF_ICR */
#define RGF_CAF_ICR			(0x88946c) /* struct RGF_ICR */
#define RGF_CAF_OSC_CONTROL		(0x88afa4)
	#define BIT_CAF_OSC_XTAL_EN		BIT(0)
@@ -794,6 +795,7 @@ struct wil_halp {
	struct mutex		lock; /* protect halp ref_cnt */
	unsigned int		ref_cnt;
	struct completion	comp;
	atomic_t		handle_icr;
};

struct wil_blob_wrapper {