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Commit 7b22b8c4 authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

drm/i915/cnp: Introduce Cannonpoint PCH. 



Most of south engine display that is in PCH is still the
same as SPT and KBP, except for this key differences:

- Backlight: Backlight programming changed in CNP PCH.
- Panel Power: Sligh programming changed in CNP PCH.
- GMBUS and GPIO: The pin mapping has changed in CNP PCH.

All of these changes follow more the BXT style.

v2: Update definition to use dev_priv isntead of dev (Tvrtko).

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496434004-29812-1-git-send-email-rodrigo.vivi@intel.com
parent 1d24ad45

drivers/gpu/drm/i915/i915_drv.c

+3 −0
Original line number Diff line number Diff line
@@ -216,6 +216,9 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) 
				DRM_DEBUG_KMS("Found KabyPoint PCH\n");

				WARN_ON(!IS_SKYLAKE(dev_priv) &&

					!IS_KABYLAKE(dev_priv));

			} else if (id == INTEL_PCH_CNP_DEVICE_ID_TYPE) {

				dev_priv->pch_type = PCH_CNP;

				DRM_DEBUG_KMS("Found CannonPoint PCH\n");

			} else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||

				   (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||

				   ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&

drivers/gpu/drm/i915/i915_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -1150,6 +1150,7 @@ enum intel_pch { 
	PCH_LPT,	/* Lynxpoint PCH */

	PCH_SPT,        /* Sunrisepoint PCH */

	PCH_KBP,        /* Kabypoint PCH */

	PCH_CNP,        /* Cannonpoint PCH */

	PCH_NOP,

};
@@ -2965,11 +2966,13 @@ intel_info(const struct drm_i915_private *dev_priv) 
#define INTEL_PCH_SPT_DEVICE_ID_TYPE		0xA100

#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE		0x9D00

#define INTEL_PCH_KBP_DEVICE_ID_TYPE		0xA200

#define INTEL_PCH_CNP_DEVICE_ID_TYPE		0xA300

#define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100

#define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000

#define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */



#define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)

#define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)

#define HAS_PCH_KBP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_KBP)

#define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)

#define HAS_PCH_LPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_LPT)

drivers/gpu/drm/i915/i915_irq.c

+4 −2
Original line number Diff line number Diff line
@@ -2548,7 +2548,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) 
			I915_WRITE(SDEIIR, iir);

			ret = IRQ_HANDLED;



			if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))

			if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||

			    HAS_PCH_CNP(dev_priv))

				spt_irq_handler(dev_priv, iir);

			else

				cpt_irq_handler(dev_priv, iir);
@@ -4289,7 +4290,8 @@ void intel_irq_init(struct drm_i915_private *dev_priv) 
		dev->driver->disable_vblank = gen8_disable_vblank;

		if (IS_GEN9_LP(dev_priv))

			dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;

		else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))

		else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||

			 HAS_PCH_CNP(dev_priv))

			dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;

		else

			dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;