Merge "ARM: dts: qcom: Add HS-I2S device tree support on SA8155-VM" (7b1d5892) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/sa8155-vm-pinctrl.dtsi

+447 −0

Original line number	Diff line number	Diff line
		@@ -21,5 +21,452 @@
		interrupt-controller;
		#interrupt-cells = <2>;
		};

		hs1_i2s_mclk {
		hs1_i2s_mclk_sleep: hs1_i2s_mclk_sleep {
		mux {
		pins = "gpio155";
		function = "gpio";
		};

		config {
		pins = "gpio155";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs1_i2s_mclk_active: hs1_i2s_mclk_active {
		mux {
		pins = "gpio155";
		function = "hs1_mi2s";
		};

		config {
		pins = "gpio155";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs1_i2s_sck {
		hs1_i2s_sck_sleep: hs1_i2s_sck_sleep {
		mux {
		pins = "gpio156";
		function = "gpio";
		};

		config {
		pins = "gpio156";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs1_i2s_sck_active: hs1_i2s_sck_active {
		mux {
		pins = "gpio156";
		function = "hs1_mi2s";
		};

		config {
		pins = "gpio156";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs1_i2s_ws {
		hs1_i2s_ws_sleep: hs1_i2s_ws_sleep {
		mux {
		pins = "gpio157";
		function = "gpio";
		};

		config {
		pins = "gpio157";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs1_i2s_ws_active: hs1_i2s_ws_active {
		mux {
		pins = "gpio157";
		function = "hs1_mi2s";
		};

		config {
		pins = "gpio157";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs1_i2s_data0 {
		hs1_i2s_data0_sleep: hs1_i2s_data0_sleep {
		mux {
		pins = "gpio158";
		function = "sleep";
		};

		config {
		pins = "gpio158";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs1_i2s_data0_active: hs1_i2s_data0_active {
		mux {
		pins = "gpio158";
		function = "hs1_mi2s";
		};

		config {
		pins = "gpio158";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs1_i2s_data1 {
		hs1_i2s_data1_sleep: hs1_i2s_data1_sleep {
		mux {
		pins = "gpio159";
		function = "gpio";
		};

		config {
		pins = "gpio159";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs1_i2s_data1_active: hs1_i2s_data1_active {
		mux {
		pins = "gpio159";
		function = "hs1_mi2s";
		};

		config {
		pins = "gpio159";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		hs2_i2s_mclk {
		hs2_i2s_mclk_sleep: hs2_i2s_mclk_sleep {
		mux {
		pins = "gpio160";
		function = "gpio";
		};

		config {
		pins = "gpio160";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs2_i2s_mclk_active: hs2_i2s_mclk_active {
		mux {
		pins = "gpio160";
		function = "hs2_mi2s";
		};

		config {
		pins = "gpio160";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs2_i2s_sck {
		hs2_i2s_sck_sleep: hs2_i2s_sck_sleep {
		mux {
		pins = "gpio161";
		function = "gpio";
		};

		config {
		pins = "gpio161";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs2_i2s_sck_active: hs2_i2s_sck_active {
		mux {
		pins = "gpio161";
		function = "hs2_mi2s";
		};

		config {
		pins = "gpio161";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs2_i2s_ws {
		hs2_i2s_ws_sleep: hs2_i2s_ws_sleep {
		mux {
		pins = "gpio162";
		function = "gpio";
		};

		config {
		pins = "gpio162";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs2_i2s_ws_active: hs2_i2s_ws_active {
		mux {
		pins = "gpio162";
		function = "hs2_mi2s";
		};

		config {
		pins = "gpio162";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs2_i2s_data0 {
		hs2_i2s_data0_sleep: hs2_i2s_data0_sleep {
		mux {
		pins = "gpio163";
		function = "gpio";
		};

		config {
		pins = "gpio163";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs2_i2s_data0_active: hs2_i2s_data0_active {
		mux {
		pins = "gpio163";
		function = "hs2_mi2s";
		};

		config {
		pins = "gpio163";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs2_i2s_data1 {
		hs2_i2s_data1_sleep: hs2_i2s_data1_sleep {
		mux {
		pins = "gpio164";
		function = "gpio";
		};

		config {
		pins = "gpio164";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs2_i2s_data1_active: hs2_i2s_data1_active {
		mux {
		pins = "gpio164";
		function = "hs2_mi2s";
		};

		config {
		pins = "gpio164";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		};
		};
		};

		hs3_i2s_mclk {
		hs3_i2s_mclk_sleep: hs3_i2s_mclk_sleep {
		mux {
		pins = "gpio125";
		function = "gpio";
		};

		config {
		pins = "gpio125";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs3_i2s_mclk_active: hs3_i2s_mclk_active {
		mux {
		pins = "gpio125";
		function = "hs3_mi2s";
		};

		config {
		pins = "gpio125";
		drive-strength = <8>; /* 8 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs3_i2s_sck {
		hs3_i2s_sck_sleep: hs3_i2s_sck_sleep {
		mux {
		pins = "gpio165";
		function = "gpio";
		};

		config {
		pins = "gpio165";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs3_i2s_sck_active: hs3_i2s_sck_active {
		mux {
		pins = "gpio165";
		function = "hs3_mi2s";
		};

		config {
		pins = "gpio165";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs3_i2s_ws {
		hs3_i2s_ws_sleep: hs3_i2s_ws_sleep {
		mux {
		pins = "gpio166";
		function = "gpio";
		};

		config {
		pins = "gpio166";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs3_i2s_ws_active: hs3_i2s_ws_active {
		mux {
		pins = "gpio166";
		function = "hs3_mi2s";
		};

		config {
		pins = "gpio166";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs3_i2s_data0 {
		hs3_i2s_data0_sleep: hs3_i2s_data0_sleep {
		mux {
		pins = "gpio167";
		function = "gpio";
		};

		config {
		pins = "gpio167";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs3_i2s_data0_active: hs3_i2s_data0_active {
		mux {
		pins = "gpio167";
		function = "hs3_mi2s";
		};

		config {
		pins = "gpio167";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		output-high;
		};
		};
		};

		hs3_i2s_data1 {
		hs3_i2s_data1_sleep: hs3_i2s_data1_sleep {
		mux {
		pins = "gpio168";
		function = "gpio";
		};

		config {
		pins = "gpio168";
		drive-strength = <2>; /* 2 mA */
		bias-pull-down; /* PULL DOWN */
		input-enable;
		};
		};

		hs3_i2s_data1_active: hs3_i2s_data1_active {
		mux {
		pins = "gpio168";
		function = "hs3_mi2s";
		};

		config {
		pins = "gpio168";
		drive-strength = <8>; /* 4 mA */
		bias-disable; /* NO PULL */
		};
		};
		};
		};

arch/arm64/boot/dts/qcom/sa8155-vm.dtsi

+47 −0

Original line number	Diff line number	Diff line
		@@ -29,6 +29,53 @@
		};

		&soc {
		hsi2s: qcom,hsi2s {
		compatible = "qcom,sa8155-hsi2s", "qcom,hsi2s";
		number-of-interfaces = <3>;
		reg = <0x172C0000 0x28000>,
		<0x17080000 0xE000>;
		reg-names = "lpa_if", "lpass_tcsr";
		interrupts = <GIC_SPI 267 0>;
		bit-clock-hz = <20000000>;
		interrupt-interval-ms = <10>;

		sdr0: qcom,hs0_i2s {
		compatible = "qcom,hsi2s-interface";
		minor-number = <0>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&hs1_i2s_mclk_active &hs1_i2s_sck_active
		&hs1_i2s_ws_active &hs1_i2s_data0_active
		&hs1_i2s_data1_active>;
		pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep
		&hs1_i2s_ws_sleep &hs1_i2s_data0_sleep
		&hs1_i2s_data1_sleep>;
		};

		sdr1: qcom,hs1_i2s {
		compatible = "qcom,hsi2s-interface";
		minor-number = <1>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&hs2_i2s_mclk_active &hs2_i2s_sck_active
		&hs2_i2s_ws_active &hs2_i2s_data0_active
		&hs2_i2s_data1_active>;
		pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep
		&hs2_i2s_ws_sleep &hs2_i2s_data0_sleep
		&hs2_i2s_data1_sleep>;
		};

		sdr2: qcom,hs2_i2s {
		compatible = "qcom,hsi2s-interface";
		minor-number = <2>;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&hs3_i2s_mclk_active &hs3_i2s_sck_active
		&hs3_i2s_ws_active &hs3_i2s_data0_active
		&hs3_i2s_data1_active>;
		pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep
		&hs3_i2s_ws_sleep &hs3_i2s_data0_sleep
		&hs3_i2s_data1_sleep>;
		};
		};

		clock_virt: qcom,virtio-gcc {
		compatible = "virtio,mmio";
		reg = <0x1c200000 0x1000>;