Loading drivers/gpu/drm/msm/sde/sde_crtc.c +4 −3 Original line number Diff line number Diff line Loading @@ -5116,12 +5116,13 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, sde_kms_info_add_keystr(info, "qseed_type", "qseed3"); if (sde_is_custom_client()) { if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V1) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v1"); /* No support for SMART_DMA_V1 yet */ if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V2) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v2"); else if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V2p5) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v2p5"); } if (catalog->mdp[0].has_dest_scaler) { Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.c +10 −4 Original line number Diff line number Diff line Loading @@ -2958,17 +2958,23 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) } /* * Current SDE support only Smart DMA 2.0. * Current SDE support only Smart DMA 2.0-2.5. * No support for Smart DMA 1.0 yet. */ cfg->smart_dma_rev = 0; dma_rc = of_property_read_string(np, sde_prop[SMART_DMA_REV].prop_name, &type); if (!dma_rc && !strcmp(type, "smart_dma_v2")) { if (dma_rc) { SDE_DEBUG("invalid SMART_DMA_REV node in device tree: %d\n", dma_rc); } else if (!strcmp(type, "smart_dma_v2p5")) { cfg->smart_dma_rev = SDE_SSPP_SMART_DMA_V2p5; } else if (!strcmp(type, "smart_dma_v2")) { cfg->smart_dma_rev = SDE_SSPP_SMART_DMA_V2; } else if (!dma_rc && !strcmp(type, "smart_dma_v1")) { } else if (!strcmp(type, "smart_dma_v1")) { SDE_ERROR("smart dma 1.0 is not supported in SDE\n"); cfg->smart_dma_rev = 0; } else { SDE_DEBUG("unknown smart dma version\n"); } cfg->has_src_split = PROP_VALUE_ACCESS(prop_value, SRC_SPLIT, 0); Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.h +4 −1 Original line number Diff line number Diff line Loading @@ -136,6 +136,7 @@ enum { * @SDE_SSPP_EXCL_RECT, SSPP supports exclusion rect * @SDE_SSPP_SMART_DMA_V1, SmartDMA 1.0 support * @SDE_SSPP_SMART_DMA_V2, SmartDMA 2.0 support * @SDE_SSPP_SMART_DMA_V2p5, SmartDMA 2.5 support * @SDE_SSPP_SBUF, SSPP support inline stream buffer * @SDE_SSPP_TS_PREFILL Supports prefill with traffic shaper * @SDE_SSPP_TS_PREFILL_REC1 Supports prefill with traffic shaper multirec Loading Loading @@ -165,6 +166,7 @@ enum { SDE_SSPP_EXCL_RECT, SDE_SSPP_SMART_DMA_V1, SDE_SSPP_SMART_DMA_V2, SDE_SSPP_SMART_DMA_V2p5, SDE_SSPP_SBUF, SDE_SSPP_TS_PREFILL, SDE_SSPP_TS_PREFILL_REC1, Loading Loading @@ -1145,7 +1147,8 @@ void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg); static inline bool sde_hw_sspp_multirect_enabled(const struct sde_sspp_cfg *cfg) { return test_bit(SDE_SSPP_SMART_DMA_V1, &cfg->features) || test_bit(SDE_SSPP_SMART_DMA_V2, &cfg->features); test_bit(SDE_SSPP_SMART_DMA_V2, &cfg->features) || test_bit(SDE_SSPP_SMART_DMA_V2p5, &cfg->features); } static inline sde_hw_intf_te_supported(const struct sde_mdss_cfg *sde_cfg) Loading Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +4 −3 Original line number Diff line number Diff line Loading @@ -5116,12 +5116,13 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, sde_kms_info_add_keystr(info, "qseed_type", "qseed3"); if (sde_is_custom_client()) { if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V1) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v1"); /* No support for SMART_DMA_V1 yet */ if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V2) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v2"); else if (catalog->smart_dma_rev == SDE_SSPP_SMART_DMA_V2p5) sde_kms_info_add_keystr(info, "smart_dma_rev", "smart_dma_v2p5"); } if (catalog->mdp[0].has_dest_scaler) { Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.c +10 −4 Original line number Diff line number Diff line Loading @@ -2958,17 +2958,23 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) } /* * Current SDE support only Smart DMA 2.0. * Current SDE support only Smart DMA 2.0-2.5. * No support for Smart DMA 1.0 yet. */ cfg->smart_dma_rev = 0; dma_rc = of_property_read_string(np, sde_prop[SMART_DMA_REV].prop_name, &type); if (!dma_rc && !strcmp(type, "smart_dma_v2")) { if (dma_rc) { SDE_DEBUG("invalid SMART_DMA_REV node in device tree: %d\n", dma_rc); } else if (!strcmp(type, "smart_dma_v2p5")) { cfg->smart_dma_rev = SDE_SSPP_SMART_DMA_V2p5; } else if (!strcmp(type, "smart_dma_v2")) { cfg->smart_dma_rev = SDE_SSPP_SMART_DMA_V2; } else if (!dma_rc && !strcmp(type, "smart_dma_v1")) { } else if (!strcmp(type, "smart_dma_v1")) { SDE_ERROR("smart dma 1.0 is not supported in SDE\n"); cfg->smart_dma_rev = 0; } else { SDE_DEBUG("unknown smart dma version\n"); } cfg->has_src_split = PROP_VALUE_ACCESS(prop_value, SRC_SPLIT, 0); Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.h +4 −1 Original line number Diff line number Diff line Loading @@ -136,6 +136,7 @@ enum { * @SDE_SSPP_EXCL_RECT, SSPP supports exclusion rect * @SDE_SSPP_SMART_DMA_V1, SmartDMA 1.0 support * @SDE_SSPP_SMART_DMA_V2, SmartDMA 2.0 support * @SDE_SSPP_SMART_DMA_V2p5, SmartDMA 2.5 support * @SDE_SSPP_SBUF, SSPP support inline stream buffer * @SDE_SSPP_TS_PREFILL Supports prefill with traffic shaper * @SDE_SSPP_TS_PREFILL_REC1 Supports prefill with traffic shaper multirec Loading Loading @@ -165,6 +166,7 @@ enum { SDE_SSPP_EXCL_RECT, SDE_SSPP_SMART_DMA_V1, SDE_SSPP_SMART_DMA_V2, SDE_SSPP_SMART_DMA_V2p5, SDE_SSPP_SBUF, SDE_SSPP_TS_PREFILL, SDE_SSPP_TS_PREFILL_REC1, Loading Loading @@ -1145,7 +1147,8 @@ void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg); static inline bool sde_hw_sspp_multirect_enabled(const struct sde_sspp_cfg *cfg) { return test_bit(SDE_SSPP_SMART_DMA_V1, &cfg->features) || test_bit(SDE_SSPP_SMART_DMA_V2, &cfg->features); test_bit(SDE_SSPP_SMART_DMA_V2, &cfg->features) || test_bit(SDE_SSPP_SMART_DMA_V2p5, &cfg->features); } static inline sde_hw_intf_te_supported(const struct sde_mdss_cfg *sde_cfg) Loading