Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ae66966 authored by Markos Chandras's avatar Markos Chandras Committed by Ralf Baechle
Browse files

MIPS: asm: cpu: Add cpu flag for Enhanced Virtual Addressing 



The MIPS *Aptiv family uses bit 28 in Config5 CP0 register to
indicate whether the core supports EVA or not.

Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
parent 27b3db20

arch/mips/include/asm/cpu-features.h

+3 −1
Original line number Diff line number Diff line
@@ -26,7 +26,9 @@ 
#ifndef cpu_has_segments

#define cpu_has_segments	(cpu_data[0].options & MIPS_CPU_SEGMENTS)

#endif



#ifndef cpu_has_eva

#define cpu_has_eva		(cpu_data[0].options & MIPS_CPU_EVA)

#endif



/*

 * For the moment we don't consider R6000 and R8000 so we can assume that

arch/mips/include/asm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -359,6 +359,7 @@ enum cpu_type_enum { 
#define MIPS_CPU_MICROMIPS	0x01000000 /* CPU has microMIPS capability */

#define MIPS_CPU_TLBINV		0x02000000 /* CPU supports TLBINV/F */

#define MIPS_CPU_SEGMENTS	0x04000000 /* CPU supports Segmentation Control registers */

#define MIPS_CPU_EVA		0x80000000 /* CPU supports Enhanced Virtual Addressing */



/*

 * CPU ASE encodings