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Commit 7ac468b1 authored by H. Peter Anvin's avatar H. Peter Anvin
Browse files

x86, 386 removal: Remove CONFIG_XADD



All 486+ CPUs support XADD, so remove the fallback 386 support
code.

Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1354132230-21854-4-git-send-email-hpa@linux.intel.com
parent d55c5a93
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+0 −5
Original line number Diff line number Diff line
@@ -171,13 +171,8 @@ config ARCH_MAY_HAVE_PC_FDC
	def_bool y
	depends on ISA_DMA_API

config RWSEM_GENERIC_SPINLOCK
	def_bool y
	depends on !X86_XADD

config RWSEM_XCHGADD_ALGORITHM
	def_bool y
	depends on X86_XADD

config GENERIC_CALIBRATE_DELAY
	def_bool y
+0 −3
Original line number Diff line number Diff line
@@ -304,9 +304,6 @@ config X86_L1_CACHE_SHIFT
	default "4" if MELAN || M486 || MGEODEGX1
	default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

config X86_XADD
	def_bool y

config X86_PPRO_FENCE
	bool "PentiumPro memory ordering errata workaround"
	depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
+0 −16
Original line number Diff line number Diff line
@@ -172,23 +172,7 @@ static inline int atomic_add_negative(int i, atomic_t *v)
 */
static inline int atomic_add_return(int i, atomic_t *v)
{
#ifdef CONFIG_M386
	int __i;
	unsigned long flags;
	if (unlikely(boot_cpu_data.x86 <= 3))
		goto no_xadd;
#endif
	/* Modern 486+ processor */
	return i + xadd(&v->counter, i);

#ifdef CONFIG_M386
no_xadd: /* Legacy 386 processor */
	raw_local_irq_save(flags);
	__i = atomic_read(v);
	atomic_set(v, i + __i);
	raw_local_irq_restore(flags);
	return i + __i;
#endif
}

/**
+1 −17
Original line number Diff line number Diff line
@@ -124,27 +124,11 @@ static inline int local_add_negative(long i, local_t *l)
 */
static inline long local_add_return(long i, local_t *l)
{
	long __i;
#ifdef CONFIG_M386
	unsigned long flags;
	if (unlikely(boot_cpu_data.x86 <= 3))
		goto no_xadd;
#endif
	/* Modern 486+ processor */
	__i = i;
	long __i = i;
	asm volatile(_ASM_XADD "%0, %1;"
		     : "+r" (i), "+m" (l->a.counter)
		     : : "memory");
	return i + __i;

#ifdef CONFIG_M386
no_xadd: /* Legacy 386 processor */
	local_irq_save(flags);
	__i = local_read(l);
	local_set(l, i + __i);
	local_irq_restore(flags);
	return i + __i;
#endif
}

static inline long local_sub_return(long i, local_t *l)
+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ config X86_64
	select MODULES_USE_ELF_RELA

config RWSEM_XCHGADD_ALGORITHM
	def_bool X86_XADD && 64BIT
	def_bool 64BIT

config RWSEM_GENERIC_SPINLOCK
	def_bool !RWSEM_XCHGADD_ALGORITHM