Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7a8d1ec1 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent 



Since the default DMA ops for arm64 are non-coherent, mark the X-Gene
controller explicitly as dma-coherent to avoid additional cache
maintenance.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Cc: Loc Ho <lho@apm.com>
parent 6ecba8eb

Documentation/devicetree/bindings/ata/apm-xgene.txt

+3 −0
Original line number Original line Diff line number Diff line
@@ -24,6 +24,7 @@ Required properties: 
  * "sata-phy" for the SATA 6.0Gbps PHY

  * "sata-phy" for the SATA 6.0Gbps PHY





Optional properties:

Optional properties:

- dma-coherent		: Present if dma operations are coherent

- status		: Shall be "ok" if enabled or "disabled" if disabled.

- status		: Shall be "ok" if enabled or "disabled" if disabled.

			  Default is "ok".

			  Default is "ok".
@@ -55,6 +56,7 @@ Example: 
			      <0x0 0x1f22e000 0x0 0x1000>,

			      <0x0 0x1f22e000 0x0 0x1000>,

			      <0x0 0x1f227000 0x0 0x1000>;

			      <0x0 0x1f227000 0x0 0x1000>;

			interrupts = <0x0 0x87 0x4>;

			interrupts = <0x0 0x87 0x4>;

			dma-coherent;

			status = "ok";

			status = "ok";

			clocks = <&sataclk 0>;

			clocks = <&sataclk 0>;

			phys = <&phy2 0>;

			phys = <&phy2 0>;
@@ -69,6 +71,7 @@ Example: 
			      <0x0 0x1f23e000 0x0 0x1000>,

			      <0x0 0x1f23e000 0x0 0x1000>,

			      <0x0 0x1f237000 0x0 0x1000>;

			      <0x0 0x1f237000 0x0 0x1000>;

			interrupts = <0x0 0x88 0x4>;

			interrupts = <0x0 0x88 0x4>;

			dma-coherent;

			status = "ok";

			status = "ok";

			clocks = <&sataclk 0>;

			clocks = <&sataclk 0>;

			phys = <&phy3 0>;

			phys = <&phy3 0>;

arch/arm64/boot/dts/apm-storm.dtsi

+3 −0
Original line number Original line Diff line number Diff line
@@ -307,6 +307,7 @@ 
			      <0x0 0x1f21e000 0x0 0x1000>,

			      <0x0 0x1f21e000 0x0 0x1000>,

			      <0x0 0x1f217000 0x0 0x1000>;

			      <0x0 0x1f217000 0x0 0x1000>;

			interrupts = <0x0 0x86 0x4>;

			interrupts = <0x0 0x86 0x4>;

			dma-coherent;

			status = "disabled";

			status = "disabled";

			clocks = <&sata01clk 0>;

			clocks = <&sata01clk 0>;

			phys = <&phy1 0>;

			phys = <&phy1 0>;
@@ -321,6 +322,7 @@ 
			      <0x0 0x1f22e000 0x0 0x1000>,

			      <0x0 0x1f22e000 0x0 0x1000>,

			      <0x0 0x1f227000 0x0 0x1000>;

			      <0x0 0x1f227000 0x0 0x1000>;

			interrupts = <0x0 0x87 0x4>;

			interrupts = <0x0 0x87 0x4>;

			dma-coherent;

			status = "ok";

			status = "ok";

			clocks = <&sata23clk 0>;

			clocks = <&sata23clk 0>;

			phys = <&phy2 0>;

			phys = <&phy2 0>;
@@ -334,6 +336,7 @@ 
			      <0x0 0x1f23d000 0x0 0x1000>,

			      <0x0 0x1f23d000 0x0 0x1000>,

			      <0x0 0x1f23e000 0x0 0x1000>;

			      <0x0 0x1f23e000 0x0 0x1000>;

			interrupts = <0x0 0x88 0x4>;

			interrupts = <0x0 0x88 0x4>;

			dma-coherent;

			status = "ok";

			status = "ok";

			clocks = <&sata45clk 0>;

			clocks = <&sata45clk 0>;

			phys = <&phy3 0>;

			phys = <&phy3 0>;