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Commit 7a43906f authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
Browse files

powerpc: Set missing wakeup bit in LPCR on POWER9 



There is a new bit, LPCR_PECE_HVEE (Hypervisor Virtualization Exit
Enable), which controls wakeup from STOP states on Hypervisor
Virtualization Interrupts (which happen to also be all external
interrupts in host or bare metal mode).

It needs to be set or we will miss wakeups.

Fixes: 9baaef0a ("powerpc/irq: Add support for HV virtualization interrupts")
Cc: stable@vger.kernel.org # v4.8+
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
[mpe: Rename it to HVEE to match the name in the ISA]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent cac4a185

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -355,6 +355,7 @@ 
#define     LPCR_PECE0		ASM_CONST(0x0000000000004000)	/* ext. exceptions can cause exit */

#define     LPCR_PECE1		ASM_CONST(0x0000000000002000)	/* decrementer can cause exit */

#define     LPCR_PECE2		ASM_CONST(0x0000000000001000)	/* machine check etc can cause exit */

#define     LPCR_PECE_HVEE	ASM_CONST(0x0000400000000000)	/* P9 Wakeup on HV interrupts */

#define   LPCR_MER		ASM_CONST(0x0000000000000800)	/* Mediated External Exception */

#define   LPCR_MER_SH		11

#define   LPCR_TC		ASM_CONST(0x0000000000000200)	/* Translation control */

arch/powerpc/kernel/cpu_setup_power.S

+4 −4
Original line number Diff line number Diff line
@@ -98,8 +98,8 @@ _GLOBAL(__setup_cpu_power9) 
	li	r0,0

	mtspr	SPRN_LPID,r0

	mfspr	r3,SPRN_LPCR

	ori	r3, r3, LPCR_PECEDH

	ori	r3, r3, LPCR_HVICE

	LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)

	or	r3, r3, r4

	bl	__init_LPCR

	bl	__init_HFSCR

	bl	__init_tlb_power9
@@ -118,8 +118,8 @@ _GLOBAL(__restore_cpu_power9) 
	li	r0,0

	mtspr	SPRN_LPID,r0

	mfspr   r3,SPRN_LPCR

	ori	r3, r3, LPCR_PECEDH

	ori	r3, r3, LPCR_HVICE

	LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)

	or	r3, r3, r4

	bl	__init_LPCR

	bl	__init_HFSCR

	bl	__init_tlb_power9