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Commit 79f255a0 authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira
Browse files

drm/i915: Store encoder power domain in struct intel_encoder 



The encoder power domain is obviously tied to the encoder, so store it
in struct intel_encoder. This avoids some indirection.

v2: Rebase
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170222063431.10060-3-ander.conselvan.de.oliveira@intel.com
parent 5432fcaf

drivers/gpu/drm/i915/intel_crt.c

+9 −12
Original line number Diff line number Diff line
@@ -69,12 +69,11 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, 
	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crt *crt = intel_encoder_to_crt(encoder);

	enum intel_display_power_domain power_domain;

	u32 tmp;

	bool ret;



	power_domain = intel_display_port_power_domain(encoder);

	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

	if (!intel_display_power_get_if_enabled(dev_priv,

						encoder->power_domain))

		return false;



	ret = false;
@@ -91,7 +90,7 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, 


	ret = true;

out:

	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, encoder->power_domain);



	return ret;

}
@@ -676,7 +675,6 @@ intel_crt_detect(struct drm_connector *connector, bool force) 
	struct drm_i915_private *dev_priv = to_i915(connector->dev);

	struct intel_crt *crt = intel_attached_crt(connector);

	struct intel_encoder *intel_encoder = &crt->base;

	enum intel_display_power_domain power_domain;

	enum drm_connector_status status;

	struct intel_load_detect_pipe tmp;

	struct drm_modeset_acquire_ctx ctx;
@@ -689,8 +687,7 @@ intel_crt_detect(struct drm_connector *connector, bool force) 
	if (dmi_check_system(intel_spurious_crt_detect))

		return connector_status_disconnected;



	power_domain = intel_display_port_power_domain(intel_encoder);

	intel_display_power_get(dev_priv, power_domain);

	intel_display_power_get(dev_priv, intel_encoder->power_domain);



	if (I915_HAS_HOTPLUG(dev_priv)) {

		/* We can not rely on the HPD pin always being correctly wired
@@ -745,7 +742,7 @@ intel_crt_detect(struct drm_connector *connector, bool force) 
	drm_modeset_acquire_fini(&ctx);



out:

	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, intel_encoder->power_domain);

	return status;

}
@@ -761,12 +758,10 @@ static int intel_crt_get_modes(struct drm_connector *connector) 
	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crt *crt = intel_attached_crt(connector);

	struct intel_encoder *intel_encoder = &crt->base;

	enum intel_display_power_domain power_domain;

	int ret;

	struct i2c_adapter *i2c;



	power_domain = intel_display_port_power_domain(intel_encoder);

	intel_display_power_get(dev_priv, power_domain);

	intel_display_power_get(dev_priv, intel_encoder->power_domain);



	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);

	ret = intel_crt_ddc_get_modes(connector, i2c);
@@ -778,7 +773,7 @@ static int intel_crt_get_modes(struct drm_connector *connector) 
	ret = intel_crt_ddc_get_modes(connector, i2c);



out:

	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, intel_encoder->power_domain);



	return ret;

}
@@ -904,6 +899,8 @@ void intel_crt_init(struct drm_i915_private *dev_priv) 


	crt->adpa_reg = adpa_reg;



	crt->base.power_domain = POWER_DOMAIN_PORT_CRT;



	crt->base.compute_config = intel_crt_compute_config;

	if (HAS_PCH_SPLIT(dev_priv)) {

		crt->base.disable = pch_disable_crt;

drivers/gpu/drm/i915/intel_ddi.c

+7 −8
Original line number Diff line number Diff line
@@ -1349,12 +1349,11 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector) 
	enum port port = intel_ddi_get_encoder_port(intel_encoder);

	enum pipe pipe = 0;

	enum transcoder cpu_transcoder;

	enum intel_display_power_domain power_domain;

	uint32_t tmp;

	bool ret;



	power_domain = intel_display_port_power_domain(intel_encoder);

	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

	if (!intel_display_power_get_if_enabled(dev_priv,

						intel_encoder->power_domain))

		return false;



	if (!intel_encoder->get_hw_state(intel_encoder, &pipe)) {
@@ -1396,7 +1395,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector) 
	}



out:

	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, intel_encoder->power_domain);



	return ret;

}
@@ -1407,13 +1406,12 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, 
	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum port port = intel_ddi_get_encoder_port(encoder);

	enum intel_display_power_domain power_domain;

	u32 tmp;

	int i;

	bool ret;



	power_domain = intel_display_port_power_domain(encoder);

	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

	if (!intel_display_power_get_if_enabled(dev_priv,

						encoder->power_domain))

		return false;



	ret = false;
@@ -1470,7 +1468,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, 
				  "(PHY_CTL %08x)\n", port_name(port), tmp);

	}



	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, encoder->power_domain);



	return ret;

}
@@ -2237,6 +2235,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) 
	intel_dig_port->max_lanes = max_lanes;



	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;

	intel_encoder->power_domain = intel_port_to_power_domain(port);

	intel_encoder->port = port;

	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

	intel_encoder->cloneable = 0;

drivers/gpu/drm/i915/intel_display.c

+2 −29
Original line number Diff line number Diff line
@@ -5568,7 +5568,7 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc) 
	I915_WRITE(BCLRPAT(crtc->pipe), 0);

}



static enum intel_display_power_domain port_to_power_domain(enum port port)

enum intel_display_power_domain intel_port_to_power_domain(enum port port)

{

	switch (port) {

	case PORT_A:
@@ -5587,33 +5587,6 @@ static enum intel_display_power_domain port_to_power_domain(enum port port) 
	}

}



enum intel_display_power_domain

intel_display_port_power_domain(struct intel_encoder *intel_encoder)

{

	struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);

	struct intel_digital_port *intel_dig_port;



	switch (intel_encoder->type) {

	case INTEL_OUTPUT_UNKNOWN:

		/* Only DDI platforms should ever use this output type */

		WARN_ON_ONCE(!HAS_DDI(dev_priv));

	case INTEL_OUTPUT_DP:

	case INTEL_OUTPUT_HDMI:

	case INTEL_OUTPUT_EDP:

		intel_dig_port = enc_to_dig_port(&intel_encoder->base);

		return port_to_power_domain(intel_dig_port->port);

	case INTEL_OUTPUT_DP_MST:

		intel_dig_port = enc_to_mst(&intel_encoder->base)->primary;

		return port_to_power_domain(intel_dig_port->port);

	case INTEL_OUTPUT_ANALOG:

		return POWER_DOMAIN_PORT_CRT;

	case INTEL_OUTPUT_DSI:

		return POWER_DOMAIN_PORT_DSI;

	default:

		return POWER_DOMAIN_PORT_OTHER;

	}

}



static u64 get_crtc_power_domains(struct drm_crtc *crtc,

				  struct intel_crtc_state *crtc_state)

{
@@ -5637,7 +5610,7 @@ static u64 get_crtc_power_domains(struct drm_crtc *crtc, 
	drm_for_each_encoder_mask(encoder, dev, crtc_state->base.encoder_mask) {

		struct intel_encoder *intel_encoder = to_intel_encoder(encoder);



		mask |= BIT_ULL(intel_display_port_power_domain(intel_encoder));

		mask |= BIT_ULL(intel_encoder->power_domain);

	}



	if (HAS_DDI(dev_priv) && crtc_state->has_audio)

drivers/gpu/drm/i915/intel_dp.c

+4 −4
Original line number Diff line number Diff line
@@ -2496,12 +2496,11 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder, 
	enum port port = dp_to_dig_port(intel_dp)->port;

	struct drm_device *dev = encoder->base.dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum intel_display_power_domain power_domain;

	u32 tmp;

	bool ret;



	power_domain = intel_display_port_power_domain(encoder);

	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

	if (!intel_display_power_get_if_enabled(dev_priv,

						encoder->power_domain))

		return false;



	ret = false;
@@ -2537,7 +2536,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder, 
	ret = true;



out:

	intel_display_power_put(dev_priv, power_domain);

	intel_display_power_put(dev_priv, encoder->power_domain);



	return ret;

}
@@ -6097,6 +6096,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, 
	intel_dig_port->max_lanes = 4;



	intel_encoder->type = INTEL_OUTPUT_DP;

	intel_encoder->power_domain = intel_port_to_power_domain(port);

	if (IS_CHERRYVIEW(dev_priv)) {

		if (port == PORT_D)

			intel_encoder->crtc_mask = 1 << 2;

drivers/gpu/drm/i915/intel_dp_mst.c

+1 −0
Original line number Diff line number Diff line
@@ -548,6 +548,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum 
			 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));



	intel_encoder->type = INTEL_OUTPUT_DP_MST;

	intel_encoder->power_domain = intel_dig_port->base.power_domain;

	intel_encoder->port = intel_dig_port->port;

	intel_encoder->crtc_mask = 0x7;

	intel_encoder->cloneable = 0;