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Commit 79c70580 authored by Lingutla Chandrasekhar's avatar Lingutla Chandrasekhar Committed by Prasad Sodagudi
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drivers: llcc: add support to detect llcc instances dynamically



Read llcc common register to get the number of instances and
populate target based configurations accordingly.

Change-Id: I512235de5206004f77c1598396db507a4a949053
Signed-off-by: default avatarLingutla Chandrasekhar <clingutla@codeaurora.org>
parent 967c44cd
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+20 −6
Original line number Diff line number Diff line
@@ -43,7 +43,10 @@
#define LLCC_STATUS_READ_DELAY 100

#define CACHE_LINE_SIZE_SHIFT 6
#define SIZE_PER_LLCC_SHIFT   2

#define LLCC_COMMON_STATUS0		0x0003000C
#define LLCC_LB_CNT_MASK		0xf0000000
#define LLCC_LB_CNT_SHIFT		28

#define MAX_CAP_TO_BYTES(n) (n * 1024)
#define LLCC_TRP_ACT_CTRLn(n) (n * 0x1000)
@@ -65,6 +68,7 @@ struct llcc_drv_data {
	u32 llcc_config_data_sz;
	u32 max_slices;
	u32 b_off;
	u32 no_banks;
	unsigned long *llcc_slice_map;
};

@@ -346,13 +350,15 @@ static void qcom_llcc_cfg_program(struct platform_device *pdev)
		attr1_val |= (llcc_table[i].priority << ATTR1_PRIORITY_SHIFT);

		max_cap_cacheline = MAX_CAP_TO_BYTES(llcc_table[i].max_cap);
		max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
		/* There are four llcc instances llcc0..llcc3. The SW writes to
		 * to broadcast register which gets propagated to each llcc.

		/* LLCC instances can vary for each target.
		 * The SW writes to broadcast register which gets propagated
		 * to each llcc instace (llcc0,.. llccN).
		 * Since the size of the memory is divided equally amongst the
		 * four llcc, we need to divide the max cap by 4
		 * llcc instances, we need to configure the max cap accordingly.
		 */
		max_cap_cacheline >>= SIZE_PER_LLCC_SHIFT;
		max_cap_cacheline = (max_cap_cacheline / drv->no_banks);
		max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT;
		attr1_val |= (max_cap_cacheline << ATTR1_MAX_CAP_SHIFT);

		attr0_val = llcc_table[i].res_ways & ATTR0_RES_WAYS_MASK;
@@ -379,6 +385,7 @@ int qcom_llcc_probe(struct platform_device *pdev,
		      const struct llcc_slice_config *llcc_cfg, u32 sz)
{
	int rc = 0;
	u32 num_banks = 0;
	struct device *dev = &pdev->dev;
	static struct llcc_drv_data *drv_data;

@@ -390,6 +397,13 @@ int qcom_llcc_probe(struct platform_device *pdev,
	if (!drv_data->llcc_map)
		return PTR_ERR(drv_data->llcc_map);

	regmap_read(drv_data->llcc_map, LLCC_COMMON_STATUS0,
		    &num_banks);

	num_banks &= LLCC_LB_CNT_MASK;
	num_banks >>= LLCC_LB_CNT_SHIFT;
	drv_data->no_banks = num_banks;

	rc = of_property_read_u32(pdev->dev.of_node, "max-slices",
				  &drv_data->max_slices);
	if (rc) {