Loading drivers/iommu/arm-smmu.c +14 −0 Original line number Diff line number Diff line Loading @@ -1635,6 +1635,9 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, reg |= SCTLR_HUPCF; } if (attributes & (1 << DOMAIN_ATTR_NO_CFRE)) reg &= ~SCTLR_CFRE; if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) && !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1) reg |= SCTLR_M; Loading Loading @@ -3201,6 +3204,11 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)); ret = 0; break; case DOMAIN_ATTR_NO_CFRE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_NO_CFRE)); ret = 0; break; case DOMAIN_ATTR_QCOM_MMU500_ERRATA_MIN_IOVA_ALIGN: *((int *)data) = smmu_domain->qsmmuv500_errata1_min_iova_align; ret = 0; Loading Loading @@ -3417,6 +3425,12 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain, 1 << DOMAIN_ATTR_CB_STALL_DISABLE; ret = 0; break; case DOMAIN_ATTR_NO_CFRE: if (*((int *)data)) smmu_domain->attributes |= 1 << DOMAIN_ATTR_NO_CFRE; ret = 0; break; default: ret = -ENODEV; } Loading include/linux/iommu.h +6 −0 Original line number Diff line number Diff line Loading @@ -133,6 +133,11 @@ enum iommu_cap { * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. * The caller can invoke iommu_domain_get_attr to check if the underlying * iommu implementation supports these constraints. * * DOMAIN_ATTR_NO_CFRE * Some bus implementations may enter a bad state if iommu reports an error * on context fault. As context faults are not always fatal, this must be * avoided. */ enum iommu_attr { Loading Loading @@ -163,6 +168,7 @@ enum iommu_attr { DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR, DOMAIN_ATTR_QCOM_MMU500_ERRATA_MIN_IOVA_ALIGN, DOMAIN_ATTR_USE_LLC_NWA, DOMAIN_ATTR_NO_CFRE, DOMAIN_ATTR_MAX, }; Loading Loading
drivers/iommu/arm-smmu.c +14 −0 Original line number Diff line number Diff line Loading @@ -1635,6 +1635,9 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, reg |= SCTLR_HUPCF; } if (attributes & (1 << DOMAIN_ATTR_NO_CFRE)) reg &= ~SCTLR_CFRE; if ((!(attributes & (1 << DOMAIN_ATTR_S1_BYPASS)) && !(attributes & (1 << DOMAIN_ATTR_EARLY_MAP))) || !stage1) reg |= SCTLR_M; Loading Loading @@ -3201,6 +3204,11 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, & (1 << DOMAIN_ATTR_CB_STALL_DISABLE)); ret = 0; break; case DOMAIN_ATTR_NO_CFRE: *((int *)data) = !!(smmu_domain->attributes & (1 << DOMAIN_ATTR_NO_CFRE)); ret = 0; break; case DOMAIN_ATTR_QCOM_MMU500_ERRATA_MIN_IOVA_ALIGN: *((int *)data) = smmu_domain->qsmmuv500_errata1_min_iova_align; ret = 0; Loading Loading @@ -3417,6 +3425,12 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain, 1 << DOMAIN_ATTR_CB_STALL_DISABLE; ret = 0; break; case DOMAIN_ATTR_NO_CFRE: if (*((int *)data)) smmu_domain->attributes |= 1 << DOMAIN_ATTR_NO_CFRE; ret = 0; break; default: ret = -ENODEV; } Loading
include/linux/iommu.h +6 −0 Original line number Diff line number Diff line Loading @@ -133,6 +133,11 @@ enum iommu_cap { * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. * The caller can invoke iommu_domain_get_attr to check if the underlying * iommu implementation supports these constraints. * * DOMAIN_ATTR_NO_CFRE * Some bus implementations may enter a bad state if iommu reports an error * on context fault. As context faults are not always fatal, this must be * avoided. */ enum iommu_attr { Loading Loading @@ -163,6 +168,7 @@ enum iommu_attr { DOMAIN_ATTR_BITMAP_IOVA_ALLOCATOR, DOMAIN_ATTR_QCOM_MMU500_ERRATA_MIN_IOVA_ALIGN, DOMAIN_ATTR_USE_LLC_NWA, DOMAIN_ATTR_NO_CFRE, DOMAIN_ATTR_MAX, }; Loading