Merge "ARM: dts: msm: Add LMH-DCVSh configuration for sm6150" (77982009) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/sm6150-thermal.dtsi

+52 −0

Original line number	Diff line number	Diff line
		@@ -13,6 +13,28 @@

		#include <dt-bindings/thermal/thermal.h>

		&clock_cpucc {
		#address-cells = <1>;
		#size-cells = <1>;
		lmh_dcvs0: qcom,limits-dcvs@18358800 {
		compatible = "qcom,msm-hw-limits";
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		qcom,affinity = <0>;
		reg = <0x18358800 0x1000>,
		<0x18321000 0x1000>;
		#thermal-sensor-cells = <0>;
		};

		lmh_dcvs1: qcom,limits-dcvs@18350800 {
		compatible = "qcom,msm-hw-limits";
		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
		qcom,affinity = <1>;
		reg = <0x18350800 0x1000>,
		<0x18323000 0x1000>;
		#thermal-sensor-cells = <0>;
		};
		};

		&soc {
		qmi-tmd-devices {
		compatible = "qcom,qmi-cooling-devices";
		@@ -290,4 +312,34 @@
		};
		};
		};

		lmh-dcvs-00 {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "user_space";
		thermal-sensors = <&lmh_dcvs0>;

		trips {
		active-config {
		temperature = <95000>;
		hysteresis = <30000>;
		type = "passive";
		};
		};
		};

		lmh-dcvs-01 {
		polling-delay-passive = <0>;
		polling-delay = <0>;
		thermal-governor = "user_space";
		thermal-sensors = <&lmh_dcvs1>;

		trips {
		active-config {
		temperature = <95000>;
		hysteresis = <30000>;
		type = "passive";
		};
		};
		};
		};

arch/arm64/boot/dts/qcom/sm6150.dtsi

+16 −0

Original line number	Diff line number	Diff line
		@@ -54,6 +54,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_0>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_0: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -89,6 +91,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_100>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_100: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -119,6 +123,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_200>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_200: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -148,6 +154,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_300>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_300: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -177,6 +185,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_400>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_400: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -206,6 +216,8 @@
		enable-method = "psci";
		cache-size = <0x8000>;
		next-level-cache = <&L2_500>;
		qcom,lmh-dcvs = <&lmh_dcvs0>;
		#cooling-cells = <2>;
		L2_500: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x10000>;
		@@ -235,6 +247,8 @@
		enable-method = "psci";
		cache-size = <0x10000>;
		next-level-cache = <&L2_600>;
		qcom,lmh-dcvs = <&lmh_dcvs1>;
		#cooling-cells = <2>;
		L2_600: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x40000>;
		@@ -273,6 +287,8 @@
		enable-method = "psci";
		cache-size = <0x10000>;
		next-level-cache = <&L2_700>;
		qcom,lmh-dcvs = <&lmh_dcvs1>;
		#cooling-cells = <2>;
		L2_700: l2-cache {
		compatible = "arm,arch-cache";
		cache-size = <0x40000>;