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Commit 775e885c authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "power: qpnp-qg: Update ESR estimation parameters"

parents f61a430a 9f6cd3e9

Documentation/devicetree/bindings/power/supply/qcom/qpnp-qg.txt

+7 −0
Original line number Diff line number Diff line
@@ -295,6 +295,13 @@ First Level Node - QGAUGE device 
		    attempted by QG. If not defined the value defaults

		    to 10%.



- qcom,esr-chg-min-ibat-ua

	Usage:      optional

	Value type: <int>

	Definition: Minimun charge current (IBAT) in uA at which ESR will

		    be attempted. If not specified the default value is

		    in -450mA.



- qcom,qg-ext-sns

	Usage:      optional

	Value type: <bool>

drivers/power/supply/qcom/qg-core.h

+1 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ struct qg_dt { 
	int			esr_qual_i_ua;

	int			esr_qual_v_uv;

	int			esr_disable_soc;

	int			esr_min_ibat_ua;

	bool			hold_soc_while_full;

	bool			linearize_soc;

	bool			cl_disable;

drivers/power/supply/qcom/qg-reg.h

+5 −0
Original line number Diff line number Diff line
@@ -41,6 +41,9 @@ 
#define QG_DATA_CTL1_REG			0x41

#define MASTER_HOLD_OR_CLR_BIT			BIT(0)



#define QG_DATA_CTL2_REG			0x42

#define BURST_AVG_HOLD_FOR_READ_BIT		BIT(0)



#define QG_MODE_CTL1_REG			0x43

#define PARALLEL_IBAT_SENSE_EN_BIT		BIT(7)
@@ -97,6 +100,8 @@ 
#define QG_LAST_ADC_V_DATA0_REG			0xC0

#define QG_LAST_ADC_I_DATA0_REG			0xC2



#define QG_LAST_BURST_AVG_I_DATA0_REG		0xC6



#define QG_LAST_S3_SLEEP_V_DATA0_REG		0xCC



/* SDAM offsets */

drivers/power/supply/qcom/qg-util.c

+35 −0
Original line number Diff line number Diff line
@@ -327,3 +327,38 @@ int qg_get_battery_temp(struct qpnp_qg *chip, int *temp) 


	return rc;

}



int qg_get_battery_current(struct qpnp_qg *chip, int *ibat_ua)

{

	int rc = 0, last_ibat = 0;



	if (chip->battery_missing) {

		*ibat_ua = 0;

		return 0;

	}



	/* hold data */

	rc = qg_masked_write(chip, chip->qg_base + QG_DATA_CTL2_REG,

				BURST_AVG_HOLD_FOR_READ_BIT,

				BURST_AVG_HOLD_FOR_READ_BIT);

	if (rc < 0) {

		pr_err("Failed to hold burst-avg data rc=%d\n", rc);

		goto release;

	}



	rc = qg_read(chip, chip->qg_base + QG_LAST_BURST_AVG_I_DATA0_REG,

				(u8 *)&last_ibat, 2);

	if (rc < 0) {

		pr_err("Failed to read LAST_BURST_AVG_I reg, rc=%d\n", rc);

		goto release;

	}



	last_ibat = sign_extend32(last_ibat, 15);

	*ibat_ua = I_RAW_TO_UA(last_ibat);



release:

	/* release */

	qg_masked_write(chip, chip->qg_base + QG_DATA_CTL2_REG,

				BURST_AVG_HOLD_FOR_READ_BIT, 0);

	return rc;

}

drivers/power/supply/qcom/qg-util.h

+1 −0
Original line number Diff line number Diff line
@@ -25,5 +25,6 @@ bool is_usb_present(struct qpnp_qg *chip); 
bool is_parallel_enabled(struct qpnp_qg *chip);

int qg_write_monotonic_soc(struct qpnp_qg *chip, int msoc);

int qg_get_battery_temp(struct qpnp_qg *chip, int *batt_temp);

int qg_get_battery_current(struct qpnp_qg *chip, int *ibat_ua);



#endif