Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 76494536 authored by Anant Goel's avatar Anant Goel
Browse files

ARM: dts: msm: Add USB for SA8195 Virtual Machine 



Add primary and secondary USB controllers for USB
pass through functionality on the SA8195 virtual
machine target.

Change-Id: I051e220b9abfd3a929a264fc7c0fce07330e9b0b
Signed-off-by: default avatarAnant Goel <anantg@codeaurora.org>
parent 1dd9d0a1

arch/arm64/boot/dts/qcom/sa8195-vm-usb.dtsi

0 → 100644
+217 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/msm/msm-bus-ids.h>

#include <dt-bindings/phy/qcom,sm8150-qmp-usb3.h>



&soc {

	/* Primary USB port related controller */

	usb0: ssusb@a600000 {

		compatible = "qcom,dwc-usb3-msm";

		reg = <0x0a600000 0x100000>;

		reg-names = "core_base";



		iommus = <&apps_smmu 0x140 0x0>;

		qcom,smmu-s1-bypass;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		interrupts = <0 489 0>, <0 130 0>, <0 486 0>, <0 488 0>;

		interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

				"ss_phy_irq", "dm_hs_phy_irq";

		qcom,use-pdc-interrupts;



		USB3_GDSC-supply = <&usb30_prim_gdsc>;

		clocks = <&clock_virt GCC_USB30_PRIM_MASTER_CLK>,

			<&clock_virt GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,

			<&clock_virt GCC_AGGRE_USB3_PRIM_AXI_CLK>,

			<&clock_virt GCC_USB30_PRIM_MOCK_UTMI_CLK>,

			<&clock_virt GCC_USB30_PRIM_SLEEP_CLK>,

			<&clock_virt GCC_USB3_PRIM_CLKREF_CLK>;

		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",

					"utmi_clk", "sleep_clk", "xo";



		resets = <&clock_virt GCC_USB30_PRIM_BCR>;

		reset-names = "core_reset";



		qcom,core-clk-rate = <200000000>;

		qcom,core-clk-rate-hs = <66666667>;

		qcom,num-gsi-evt-buffs = <0x3>;

		qcom,gsi-reg-offset =

			<0x0fc /* GSI_GENERAL_CFG */

			 0x110 /* GSI_DBL_ADDR_L */

			 0x120 /* GSI_DBL_ADDR_H */

			 0x130 /* GSI_RING_BASE_ADDR_L */

			 0x144 /* GSI_RING_BASE_ADDR_H */

			 0x1a4>; /* GSI_IF_STS */

		qcom,dwc-usb3-msm-tx-fifo-size = <27696>;



		status = "disabled";



		dwc3@a600000 {

			compatible = "snps,dwc3";

			reg = <0x0a600000 0xcd00>;

			interrupts = <0 133 0>;

			usb-phy = <&usb2_phy0>, <&usb_nop_phy>;

			linux,sysdev_is_parent;

			snps,disable-clk-gating;

			snps,has-lpm-erratum;

			snps,hird-threshold = /bits/ 8 <0x10>;

			snps,ssp-u3-u0-quirk;

			snps,usb3-u1u2-disable;

			usb-core-id = <0>;

			tx-fifo-resize;

			maximum-speed = "high-speed";

			dr_mode = "otg";

		};



		usbbam: qcom,usbbam@a704000 {

			compatible = "qcom,usb-bam-msm";

			reg = <0xa704000 0x17000>;

			interrupts = <0 132 0>;



			qcom,usb-bam-fifo-baseaddr = <0x146bb000>;

			qcom,usb-bam-num-pipes = <4>;

			qcom,disable-clk-gating;

			qcom,usb-bam-override-threshold = <0x4001>;

			qcom,usb-bam-max-mbps-highspeed = <400>;

			qcom,usb-bam-max-mbps-superspeed = <3600>;

			qcom,reset-bam-on-connect;



			status = "disabled";



			qcom,pipe0 {

				label = "ssusb-qdss-in-0";

				qcom,usb-bam-mem-type = <2>;

				qcom,dir = <1>;

				qcom,pipe-num = <0>;

				qcom,peer-bam = <0>;

				qcom,peer-bam-physical-address = <0x6064000>;

				qcom,src-bam-pipe-index = <0>;

				qcom,dst-bam-pipe-index = <0>;

				qcom,data-fifo-offset = <0x0>;

				qcom,data-fifo-size = <0x1800>;

				qcom,descriptor-fifo-offset = <0x1800>;

				qcom,descriptor-fifo-size = <0x800>;

			};

		};

	};



	/* Primary USB port related High Speed PHY */

	usb2_phy0: hsphy@88e2000 {

		compatible = "qcom,usb-hsphy-snps-femto";

		reg = <0x88e2000 0x110>;

		reg-names = "hsusb_phy_base";



		vdd-supply = <&pm8195_3_l5>;

		vdda18-supply = <&pm8195_1_l12>;

		vdda33-supply = <&pm8195_3_l16>;

		qcom,vdd-voltage-level = <0 880000 880000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clock-names = "ref_clk_src";



		resets = <&clock_virt GCC_QUSB2PHY_PRIM_BCR>;

		reset-names = "phy_reset";

		qcom,param-override-seq = <0x43 0x70>;



		status = "disabled";

	};



	usb_nop_phy: usb_nop_phy {

		compatible = "usb-nop-xceiv";

	};



	/* Secondary USB port related controller */

	usb1: ssusb@a800000 {

		compatible = "qcom,dwc-usb3-msm";

		reg = <0x0a800000 0x100000>;

		reg-names = "core_base";



		iommus = <&apps_smmu 0x160 0x0>;

		qcom,smmu-s1-bypass;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		interrupts = <0 491 0>, <0 135 0>, <0 487 0>, <0 490 0>;

		interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",

				"ss_phy_irq", "dm_hs_phy_irq";

		qcom,use-pdc-interrupts;



		USB3_GDSC-supply = <&usb30_sec_gdsc>;

		clocks = <&clock_virt GCC_USB30_SEC_MASTER_CLK>,

			<&clock_virt GCC_CFG_NOC_USB3_SEC_AXI_CLK>,

			<&clock_virt GCC_AGGRE_USB3_SEC_AXI_CLK>,

			<&clock_virt GCC_USB30_SEC_MOCK_UTMI_CLK>,

			<&clock_virt GCC_USB30_SEC_SLEEP_CLK>,

			 <&clock_virt GCC_USB3_SEC_CLKREF_CLK>;

		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",

					"utmi_clk", "sleep_clk", "xo";



		resets = <&clock_virt GCC_USB30_SEC_BCR>;

		reset-names = "core_reset";



		qcom,core-clk-rate = <200000000>;

		qcom,core-clk-rate-hs = <66666667>;

		qcom,num-gsi-evt-buffs = <0x3>;

		qcom,gsi-reg-offset =

			<0x0fc /* GSI_GENERAL_CFG */

			 0x110 /* GSI_DBL_ADDR_L */

			 0x120 /* GSI_DBL_ADDR_H */

			 0x130 /* GSI_RING_BASE_ADDR_L */

			 0x144 /* GSI_RING_BASE_ADDR_H */

			 0x1a4>; /* GSI_IF_STS */

		qcom,dwc-usb3-msm-tx-fifo-size = <27696>;

		qcom,charging-disabled;



		status = "disabled";



		dwc3@a800000 {

			compatible = "snps,dwc3";

			reg = <0x0a800000 0xcd00>;

			interrupts = <0 138 0>;

			usb-phy = <&usb2_phy1>, <&usb_nop_phy>;

			linux,sysdev_is_parent;

			snps,disable-clk-gating;

			snps,has-lpm-erratum;

			snps,hird-threshold = /bits/ 8 <0x10>;

			snps,usb3_lpm_capable;

			usb-core-id = <1>;

			tx-fifo-resize;

			maximum-speed = "high-speed";

			dr_mode = "otg";

		};

	};



	/* Secondary USB port related High Speed PHY */

	usb2_phy1: hsphy@88e3000 {

		compatible = "qcom,usb-hsphy-snps-femto";

		reg = <0x88e3000 0x110>;

		reg-names = "hsusb_phy_base";



		vdd-supply = <&pm8195_3_l5>;

		vdda18-supply = <&pm8195_1_l12>;

		vdda33-supply = <&pm8195_3_l16>;

		qcom,vdd-voltage-level = <0 880000 880000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clock-names = "ref_clk_src";



		resets = <&clock_virt GCC_QUSB2PHY_SEC_BCR>;

		reset-names = "phy_reset";



		status = "disabled";

	};

};

arch/arm64/boot/dts/qcom/sa8195-vm.dtsi

+18 −31
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ 
 */



#include "skeleton64.dtsi"

#include <dt-bindings/clock/qcom,gcc-sm8150.h>

#include <dt-bindings/clock/qcom,gcc-sdmshrike.h>

#include <dt-bindings/clock/qcom,scc-sm8150.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include "quin-vm-common.dtsi"
@@ -147,44 +147,31 @@ 
		status = "disabled";

	};



	pm8150_l2: regulator-pm8150-l2 {

	pm8195_3_l5: regulator-pm8195-3-l5 {

		compatible = "qcom,stub-regulator";

		regulator-name = "pm8150_l2";

		regulator-min-microvolt = <3072000>;

		regulator-max-microvolt = <3072000>;

		qcom,init-voltage = <3072000>;

		status = "okay";

		regulator-name = "pm8195_3_l5";

		regulator-min-microvolt = <800000>;

		regulator-max-microvolt = <920000>;

		qcom,init-voltage = <800000>;

		status = "ok";

	};



	pm8150_l5: regulator-pm8150-l5 {

	pm8195_1_l12: regulator-pm8195-1-l12 {

		compatible = "qcom,stub-regulator";

		regulator-name = "pm8150_l5";

		regulator-min-microvolt = <880000>;

		regulator-max-microvolt = <880000>;

		qcom,proxy-consumer-enable;

		qcom,proxy-consumer-current = <23800>;

		qcom,init-voltage = <880000>;

		status = "okay";

	};



	pm8150_l12: regulator-pm8150-l12 {

		compatible = "qcom,stub-regulator";

		regulator-name = "pm8150_l12";

		regulator-name = "pm8195_1_l12";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-max-microvolt = <1890000>;

		qcom,init-voltage = <1800000>;

		status = "okay";

		status = "ok";

	};



	pm8150l_l3: regulator-pm8150l-l3 {

	pm8195_3_l16: regulator-pm8195-3-l16 {

		compatible = "qcom,stub-regulator";

		regulator-name = "pm8150l_l3";

		regulator-min-microvolt = <1200000>;

		regulator-max-microvolt = <1200000>;

		qcom,proxy-consumer-enable;

		qcom,proxy-consumer-current = <51800>;

		qcom,init-voltage = <1200000>;

		status = "okay";

		regulator-name = "pm8195_3_l16";

		regulator-min-microvolt = <2921000>;

		regulator-max-microvolt = <3300000>;

		qcom,init-voltage = <2921000>;

		status = "ok";

	};



	usb30_prim_gdsc: usb30_prim_gdsc {
@@ -203,5 +190,5 @@ 
#include "sdmshrike-pinctrl.dtsi"

#include "sm8150-slpi-pinctrl.dtsi"

#include "sa8155-vm-qupv3.dtsi"

#include "sa8155-vm-usb.dtsi"

#include "sa8195-vm-usb.dtsi"

#include "sa8155-vm-audio.dtsi"